Method for fabricating MOS field effect transistor

Abstract

A method of fabricating a MOS field effect transistor. A gate insulating film and a gate conductive film are formed on a semiconductor substrate. The gate conductive film is patterned to form a first gate conductive film having a thin thickness and a second gate conductive film having a thick thickness. An insulating film pattern is formed on a side wall of the second gate conductive film. The insulating film pattern is used as an etching mask to remove exposed portions of the first gate conductive film and the gate insulating film. An etch process is performed to remove the insulating film pattern and a portion of the gate insulating film under the first gate conductive film. An ion implantation process is performed using the first gate conductive film as an ion implantation buffer for a lightly doped impurity region to form a source/drain region.

1. A method of fabricating a MOS field effect transistor, comprising:
 forming a gate insulating film and a gate conductive film on a semiconductor substrate; 
 patterning the gate conductive film to form a first gate conductive film having a first thickness in a first region and a second gate conductive film having a second thickness in a second region, the second thickness greater than the first thickness; 
 forming an insulating film pattern on a side wall of the second gate conductive film; 
 using the insulating film pattern as an etching mask during an etch process to remove exposed portions of the first gate conductive film; and 
 performing an ion implantation process using the first gate conductive film as an ion implantation buffer of a lightly doped impurity region to form a source/drain region including the lightly doped impurity region and a heavily doped impurity region on the semiconductor substrate. 
 
   
   
     2. The method according to  claim 1 , wherein the step of forming an insulating film pattern uses an oxide film. 
   
   
     3. The method according to  claim 2 , wherein the step of forming an insulating film pattern comprises:
 forming the oxide film on the first gate conductive film and the second gate conductive film; and 
 performing an anisotropic etch to form an oxide film pattern on a side wall of the second gate conductive film. 
 
   
   
     4. The method according to  claim 1 , wherein during the step of forming an insulating film pattern, a thickness of the insulation film pattern corresponds to a predetermined length of the lightly doped impurity region. 
   
   
     5. The method according to  claim 1 , wherein during the step of patterning the gate conductive film, a thickness of the first conductive film corresponds to a predetermined impurity concentration and junction depth of the lightly doped impurity region. 
   
   
     6. The method according to  claim 1 , wherein during the step of forming a gate insulating film and the gate conductive film, the gate insulating and gate conductive films are sequentially formed. 
   
   
     7. The method according to  claim 1 , wherein during the step of using the insulating film pattern, the first gate conductive film and the gate insulating film are sequentially removed. 
   
   
     8. A method of fabricating a MOS field effect transistor, comprising:
 step for forming a gate insulating film and a gate conductive film on a semiconductor substrate; 
 step for patterning the gate conductive film to form a first gate conductive film having a first thickness in a first region and a second gate conductive film having a second thickness in a second region, the second thickness greater than the first thickness; 
 step for forming an insulating film pattern on a side wall of the second gate conductive film; 
 step for using the insulating film pattern as an etching mask during an etch process to remove exposed portions of the first gate conductive film and the gate insulating film; 
 step for performing an etch process to remove the insulating film pattern and a portion of the gate insulating film under the first gate conductive film; and 
 step for performing an ion implantation process using the first gate conductive film as an ion implantation buffer of a lightly doped impurity region to form a source/drain region including the lightly doped impurity region and a heavily doped impurity region on the semiconductor substrate. 
 
   
   
     9. The method according to  claim 8 , wherein the step for forming an insulating film pattern uses an oxide film. 
   
   
     10. The method according to  claim 9 , wherein the step for forming an insulating film pattern comprises:
 step for forming the oxide film on the first gate conductive film and the second gate conductive film; and 
 step for performing an anisotropic etch to form an oxide film pattern on a side wall of the second gate conductive film. 
 
   
   
     11. The method according to  claim 8 , wherein during the step for forming an insulating film pattern, a thickness of the insulation film pattern corresponds to a predetermined length of the lightly doped impurity region. 
   
   
     12. The method according to  claim 8 , wherein during the step for patterning the gate conductive film, a thickness of the first conductive film corresponds to a predetermined impurity concentration and junction depth of the lightly doped impurity region. 
   
   
     13. The method according to  claim 8 , wherein during the step for forming a gate insulating film and the gate conductive film, the gate insulating and gate conductive films are sequentially formed. 
   
   
     14. The method according to  claim 8 , wherein during the step for using the insulating film pattern, the first gate conductive film and the gate insulating film are sequentially removed.