Method of joining components

Abstract

A method of combining components to form an integrated device, wherein the components are provided on a first sacrificial wafer, and a second non-sacrificial wafer, respectively. The sacrificial wafer carries a first plurality of components and the non-sacrificial wafer carries a second plurality of components. The wafers are bonded together with an intermediate bonding material. Optionally the sacrificial wafer is thinned to a desired level. The components of the sacrificial wafer are electrically interconnected to the component(s) on the non-sacrificial wafer. Finally, optionally the intermediate bonding material is stripped away.

1. A method of combining component(s) to form an integrated device, with said components provided on a sacrificial substrate and on a non-sacrificial substrate, respectively, and with component(s) transferred from the sacrificial substrate to the non-sacrificial substrate, comprising the following steps:
 providing a non-sacrificial substrate having a first component provided thereon; 
 providing the non-sacrificial substrate with electrical contact surfaces or elements, by which surfaces or elements of a second component, provided on a sacrificial substrate and to be interconnected and integrated with the first component on the non-sacrificial substrate are to be attached to the non-sacrificial wafer; 
 providing a sacrificial wafer having the second component provided on one side thereof; 
 coating one of the sacrificial and the non-sacrificial substrate with an adhesive layer; 
 bonding the wafers together using the adhesive by bringing the wafers, carrying the first and second components together under pressure; 
 removing the substrate material of the sacrificial wafer such that only the actual second component thereon remains, thereby transferring the second component to the non-sacrificial substrate; and 
 after the second component from the sacrificial substrate has been transferred to first component on the non-sacrificial substrate, providing connections, including conductors and support legs, connecting the first component on the non-sacrificial wafer with the second component from the sacrificial substrate, using deposition, patterning and etching procedures. 
 
     
     
       2. The method as claimed in  claim 1 , wherein the adhesive is etched away, entirely or partially. 
     
     
       3. The method as claimed in  claim 1 , further comprising stripping away the adhesive after the final structures have been obtained. 
     
     
       4. The method of  claim 1 , wherein the second component on said sacrificial substrate is a transducer, and the first component on said non-sacrificial layer is an electronic device. 
     
     
       5. The method of  claim 1 , wherein at least one of said substrates are provided with contact pads for said electrical interconnection. 
     
     
       6. The method of  claim 1 , wherein said interconnection is an electrical interconnection, such as conducting material provided between said first and second components. 
     
     
       7. The method of  claim 1 , wherein said intermediate bonding material is a low temperature adhesive selected from the group comprising a polymer selected from poly-imide, bensocyclobutene (BCB), epoxy, and photoresist. 
     
     
       8. The method of  claim 5 , wherein said transducer is selected from the group consisting of IR detectors, RF devices and optical devices. 
     
     
       9. The method of  claim 8 , wherein the IR detectors are selected from the group consisting of a bolometer, a quantum well detector, and a pyroelectric detector. 
     
     
       10. The method of  claim 1 , wherein said removal of the sacrificial substrate is thinning performed by mechanical means or by etching away part of or the entire substrate, or a combination of both. 
     
     
       11. The method of  claim 1 , wherein said intermediate bonding is provided only on parts of said substrate(s). 
     
     
       12. The method of  claim 1 , wherein said first and second components are micro electronic structures having at least one contact point each between which to establish said interconnection. 
     
     
       13. The method of  claim 12 , wherein portions of said intermediate polymer layer are selectively removed such that said contact points are exposed. 
     
     
       14. The method of  claim 1 , wherein the transfer of components comprises transfer of material films or layers. 
     
     
       15. The method as claimed in  claim 1 , wherein the adhesive layer is patterned. 
     
     
       16. The method fo  claim 4 , wherein the first component is a read-out device (ROIC). 
     
     
       17. A method of combining components to form an integrated device, wherein said components are provided on a first sacrificial substrate and on a second non-sacrificial substrate, respectively, comprising the following steps:
 oxidizing a sacrificial semiconductor wafer so that an oxide layer is produced on a surface thereof; 
 growing a poly-silicon layer on the wafer; 
 depositing a Ti/Pt layer on the poly-silicon; 
 spinning photoresist on the wafer and patterning with photolithography; 
 etching first the Ti/Pt and subsequently the poly-silicon down to the oxide layer; 
 stripping of the photoresist to leave poly-silicon islands on the wafer surface; 
 etching away the poly-silicon and the oxide layer on the backside of the wafer; 
 spinning a bonding material on a non-sacrificial (ROIC) wafer; 
 bonding the two wafers together under pressure; 
 thinning the backside of the sacrificial silicon wafer down to the oxide layer; 
 etching the oxide layer; 
 spinning photoresist on the remaining bonding material for patterning and etching the bonding material to open up areas on the non-sacrificial wafer and to obtain sloped walls in the polyimide; 
 depositing Ti/Pt as a contact metal between the non-sacrificial wafer and the poly-silicon islands; 
 patterning and etching to create leg-structures; 
 stripping the remaining bonding material, to provide a free hanging, highly thermally isolated device. 
 
     
     
       18. The method as claimed in  claim 17 , comprising depositing PECVD-silicon nitride on top of the polysilicon islands to mechanically strengthen the structure. 
     
     
       19. The method as claimed in  claim 1 , wherein the components on the sacrificial wafer comprises a material selected from the group consisting of mono-Si, poly-Si, SiC, GaAs, InP. 
     
     
       20. A method of combining components to form an integrated device, wherein said components are provided on a first sacrificial substrate and a second non-sacrificial substrate, respectively, comprising the following steps:
 oxidizing a sacrificial semiconductor wafer so that an oxide layer is produced on a surface thereof;
 growing a poly-silicon layer on the wafer; 
 etching the poly-silicon and the oxide on the backside of the wafer so that the backside material of the wafer is silicon bulk material; 
 depositing a Ti/Pt layer on the poly-silicon; 
 patterning the Ti/Pt layer to form Ti/Pt structures; 
 spinning a sacrificial layer of polyimide on the wafer on top of the Ti/Pt pattern and curing; 
 opening up small areas of the polyimide over the Ti/Pt structures to provide sloped walls on these openings; 
 patterning a second layer of Ti/Pt on the polyimide to represent leg structures of a detector; 
 depositing a layer of SiN and patterning the SiN layer with the same structure as the Ti/Pt layer as a mechanical support of the leg structures; 
 spinning a polyimide on a non-sacrificial wafer (ROIC); 
 bonding the two wafers together applying pressure; 
 thinning the backside of the poly-silicon wafer down to the oxide layer; 
 spinning photoresist on the oxide layer for patterning and etching the oxide, the poly-silicon and the polyimide to open up areas on the non-sacrificial wafer; 
 depositing and patterning a layer of Al to create Al-pillars, forming electrical and mechanical contact between the non-sacrificial wafer and the detector; 
 etching the oxide layer with buffer HF (BHF); 
 patterning and etching the poly-silicon; 
 etching the SiN; 
 depositing a thin layer of molybdenum-silicide on the poly-silicon using the Ti/Pt structures as a mask; 
 stripping off all the remaining polyimide (both sacrificial polyimide layers), to provide a free hanging, highly thermally isolated device.