Method and system for maintaining shadow copies of data using a shadow mask bit

Abstract

In a multi-processor, multi-memory system, a technique designates portions of a local memory as being regions to be shadowed. A shadow control unit detects write operations to those regions designated for shadowing. The shadow control unit then executes a cloning of a write operation designated for a local memory region to be shadowed and provides the cloned data to a memory space in system memory which corresponds to the local memory region which is being shadowed.

1. A method for enhancing memory access in a multiple processing unit system including a central processing unit, a second processor, a local memory associated with the second processor and a system memory, the method comprising:
 associating a shadow mask bit and a region of the local memory; 
 identifying the region of the local memory as a region for shadowing by placing the associated shadow mask bit in a first state; 
 designating data written into said region as data being used by multiple processors including said second processor; 
 detecting a write operation to the region of local memory by the central processing unit; 
 detecting that the shadow mask bit associated with the region is in said first state; 
 cloning the write operation; and 
 writing the cloned write operation to system memory. 
 
     
     
       2. The method of  claim 1  wherein the writing the cloned write operation comprises
 translating an address of the first region in local memory to an address in system memory; and 
 storing data from the write operation to the address resulting from the translating operation. 
 
     
     
       3. The method of  claim 1  further comprising:
 associating a second region of the local memory with a second shadow mask bit; 
 identifying the second region of the local memory as a region that is not to be shadowed by placing the associated second shadow mask bit in a second state; 
 detecting a write operation to the second region of local memory by the central processing unit; 
 detecting that the second shadow mask bit is in the second state; and 
 processing the write operation to the local memory without creating a shadow copy of the write operation in the system memory. 
 
     
     
       4. The method of  claim 3  further comprising:
 resetting the second shadow mask bit to the first state; 
 detecting a second write operation to the second region of local memory; 
 detecting that the second shadow mask bit is in the first state; 
 cloning the second write operation to the second region of local memory; and 
 writing the cloned second write operation to system memory. 
 
     
     
       5. The method of  claim 1  wherein the writing the cloned write operation comprises:
 performing a single translation of an address in local memory to a single translated address in system memory; and 
 storing data from the write operation in a translated region specified by said single translated address. 
 
     
     
       6. The method of  claim 1  wherein writing the cloned write operation includes diverting access by another of said multiple processors from said local memory to said system memory. 
     
     
       7. The method of  claim 6  wherein diverting access of said another of said multiple processors includes reducing data traffic between said local memory and said second processor, thereby enhancing system performance. 
     
     
       8. A memory system comprising:
 a central processing unit; 
 a second processor; 
 a local memory associated with said second processor; 
 a shadow unit coupled to said central processing unit and including a shadow bit mask having a plurality of bits, each bit associated with a region of the local memory designated to store data used by multiple processors including said second processor; and 
 an address translator coupled to said shadow unit. 
 
     
     
       9. The system of  claim 8  wherein said address translator includes a translation cache having a pool of translations.