Semiconductor device package with reduced leakage

Abstract

A semiconductor device package comprises a container including a base and sidewalls. The base is configured to support a semiconductor device chip, and a lead frame extends through at least one of the sidewalls. A portion of the lead frame within the sidewall has at least one aperture penetrating into the lead frame. The sidewall material extends into the aperture, thereby forming a strong interfacial bond that provides a low leakage, sidewall-lead-frame interface. The base has a reentrant feature that is positioned within the thickness of at least one of the sidewalls and engages the at least one sidewall, thereby forming a low leakage base-sidewalls interface. The top surface of the base has a groove that is positioned within the thickness of at least one of the sidewalls and engages the at least one sidewall, thereby enhancing the low leakage base-sidewall interface.

1. A semiconductor device package comprising:
 a container including a base and sidewalls molded to said base, said base configured to support a semiconductor device chip, said base and sidewalls comprising materials having different thermal expansion coefficients, 
 said container configured to form a cavity for containing an encapsulant, and 
 a lead frame extending through at least one of said sidewalls, 
 a portion of said lead flame, within said at least one sidewall, having at least one feature penetrating into said frame portion, said sidewall material extending into said feature. 
 
   
   
     2. The package of  claim 1 , wherein said base material comprises a metal. 
   
   
     3. The package of  claim 2 , wherein said sidewall material comprises a plastic. 
   
   
     4. The package of  claim 1 , wherein said at least one feature is an aperture that penetrates through said lead frame, and said sidewall material fills said aperture. 
   
   
     5. The package of  claim 1 , wherein said at least one feature is a depression that does not penetrate entirely through said lead frame, and said sidewall material fills said depression. 
   
   
     6. The package of  claim 1 , wherein said at least one feature has a circular shape. 
   
   
     7. The package of  claim 6 , wherein said aperture has a stadium shape. 
   
   
     8. The package of  claim 1 , wherein said at least one feature has a rectangular shape. 
   
   
     9. The package of  claim 1 , wherein said at least one feature has a triangular shape. 
   
   
     10. The package of  claim 1 , wherein said at least one feature has a diamond shape. 
   
   
     11. The package of  claim 1 , wherein said lead frame has an array of said features arranged in rows. 
   
   
     12. The package of  claim 11 , wherein said rows are arranged to block line-of-sight paths between adjacent features. 
   
   
     13. The package of  claim 1 , wherein said base has at least one reentrant feature that is positioned within the thickness of at least one of said sidewalls and engages said at least one sidewall. 
   
   
     14. The package of  claim 13 , wherein said reentrant feature is located at the side and near the top of said base. 
   
   
     15. The package of  claim 13 , wherein said reentrant feature is a segmented flange. 
   
   
     16. The package of  claim 1 , wherein said base has at least one groove that is positioned within the thickness of at least one of said sidewalls and engages said at least one sidewall. 
   
   
     17. The package of  claim 16 , wherein said groove has sharp corners at the top of said base. 
   
   
     18. The package of  claim 1 , further including at least one conductor coupling said lead frame to said chip, said encapsulant covering said chip and said conductor. 
   
   
     19. A semiconductor device package comprising:
 a container including a metallic base and polymer sidewalls molded to said base, said base being configured to support a semiconductor device chip, 
 said container configured to form a cavity for containing an encapsulant, and 
 a lead frame extending through at least one of said sidewalls, 
 a portion of said lead frame, within said at least one sidewall, having at least one feature penetrating said frame portion, said sidewall material extending into said feature, 
 said base having at least one reentrant feature that is positioned within the thickness of at least one of said sidewalls and engages said at least one sidewall, and 
 said base having at least one groove that is positioned within the thickness of at least one of said sidewalls and engages said at least one sidewall. 
 
   
   
     20. The package of  claim 19 , further including at least one conductor electrically coupling said lead frame to said chip, said encapsulant covering said chip and said conductor.