Method of fabricating microconnectors

Abstract

A method of fabricating microconnectors. A wafer is provided, and a dielectric layer is formed on a first surface of the wafer. The dielectric layer is bonded to a support wafer, and a thinning process is performed. A second surface of the wafer is then bonded to the support wafer, and a conductive wiring pattern is formed on the dielectric layer. An insulating layer is formed on the dielectric layer and the conductive wiring pattern. A portion of the insulating layer is removed to expose the conductive wiring pattern, and a portion of the dielectric layer and the wafer is removed to divide the wafer into a plurality of microconnectors.

1. A method of fabricating microconnectors comprising:
 providing a wafer comprising a first surface and a second surface; 
 forming a dielectric layer on the first surface of the wafer; 
 using a first bonding layer to combine the dielectric layer and a support wafer; 
 performing a thinning process to thin the wafer at the second surface of the wafer; 
 removing the first bonding layer, and using a second bonding layer to combine the second surface of the wafer and the support wafer; 
 forming a conductive wiring pattern on the dielectric layer; 
 forming an insulating layer on the dielectric layer and the conductive wiring pattern; 
 forming a mask pattern with a plurality of first openings corresponding to the conductive wiring pattern, and a plurality of second openings defining a scribe lines pattern on the insulating layer; 
 removing the insulating layer exposed by the first openings in order to expose the conductive wiring pattern, and removing the insulating layer, the dielectric layer and the wafer exposed by the second openings to divide the wafer into a plurality of microconnectors; 
 removing the mask pattern; and 
 removing the second bonding layer. 
 
     
     
       2. The method of  claim 1 , wherein the dielectric layer is an oxide layer. 
     
     
       3. The method of  claim 1 , wherein the first bonding layer comprises a thermal release tape or an ultraviolet (UV) tape. 
     
     
       4. The method of  claim 1 , wherein the support wafer comprises a silicon wafer, a glass wafer, a quartz wafer or a plastic wafer. 
     
     
       5. The method of  claim 1 , further comprising performing a preliminary thinning process to thin the second surface of the wafer before using the first bonding layer to combine the dielectric layer and the support wafer. 
     
     
       6. The method of  claim 5 , wherein the preliminary thinning process comprises a grinding process. 
     
     
       7. The method of  claim 1 , wherein the thinning process comprises a plasma etching process. 
     
     
       8. The method of  claim 1 , wherein the thinning process comprises a chemical etching process. 
     
     
       9. The method of  claim 1 , wherein the thinning process comprises a buffing polishing process. 
     
     
       10. The method of  claim 1 , wherein the second bonding layer comprises a thermal release tape or an ultraviolet (UV) tape. 
     
     
       11. The method of  claim 1 , wherein removing the wafer exposed by the second openings is accomplished by performing deep etching techniques.