On-die anti-resonance structure for integrated circuit

Abstract

A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.

1. An integrated circuit structure, comprising:
 a package for an integrated circuit chip; 
 an integrated circuit chip connected to the package; 
 a power delivery path incorporated into the integrated circuit structure for receiving power from a power supply, wherein the impedance of the power delivery path exhibits at least one resonance peak at an operating frequency due to inductance and capacitance associated with the chip and package; and, 
 a series RLC circuit connected to the integrated circuit structure, wherein the series RLC circuit has resistance, inductance, and capacitance components and component values selected to reduce the resonance peak of the power delivery path impedance, and wherein the inductance component of the series RLC circuit is implemented with a conducting metal trace connected to one or more decoupling capacitors. 
 
     
     
       2. The integrated circuit structure of  claim 1  wherein the component values of the series RLC circuit are selected such that the series RLC circuit has a resonance frequency approximately equal to the frequency of the resonance peak due to the inductance and capacitance associated with the integrated circuit chip and package. 
     
     
       3. The integrated circuit structure of  claim 1  wherein the series RLC circuit is located on the integrated circuit chip. 
     
     
       4. The integrated circuit structure of  claim 1  wherein the series RLC circuit is placed in parallel with the capacitance associated with the integrated circuit chip. 
     
     
       5. The integrated circuit structure of  claim 1  wherein the capacitance associated with the integrated circuit chip includes the one or more decoupling capacitors. 
     
     
       6. The integrated circuit structure of  claim 1  wherein the capacitance component of the series RLC circuit is implemented with the one or more decoupling capacitors. 
     
     
       7. The integrated circuit structure of  claim 1  wherein the dimensions of the conducting metal trace are adjusted so that the resonance frequency of the series RLC circuit approximately matches the frequency of the resonance peak. 
     
     
       8. The integrated circuit structure of  claim 1  wherein the resistance component of the series RLC circuit is implemented with a conducting metal trace connected to the one or more decoupling capacitors. 
     
     
       9. The integrated circuit structure of  claim 1  wherein the resistance component of the series RLC circuit is implemented with a poly-resistor. 
     
     
       10. The method of  claim 1  further comprising adjusting the dimensions of the conducting metal trace so that the resonance frequency of the series RLC circuit approximately matches the frequency of the resonance peak. 
     
     
       11. The method of  claim 1  further comprising implementing the resistance component of the series RLC circuit with a conducting metal trace connected to the one or more decoupling capacitors. 
     
     
       12. A method, comprising:
 constructing an integrated circuit structure comprising an integrated circuit chip with the integrated circuit chip being connected to a package and incorporating a power delivery path into the integrated circuit structure for receiving power from a power supply, wherein the impedance of the power delivery path exhibits at least one resonance peak at an operating frequency due to inductance and capacitance associated with the integrated circuit chip and package; 
 and, 
 connecting a series RLC circuit to the integrated circuit structure, wherein the series RLC circuit has resistance, inductance, and capacitance components and component values selected to reduce the resonance peak of the power delivery path impedance, and wherein the inductance component of the series RLC circuit is implemented with a conducting metal trace connected to one or more decoupling capacitors. 
 
     
     
       13. The method of  claim 12  further comprising selecting the component values of the series RLC circuit such that the series RLC circuit has a resonance frequency approximately equal to the frequency of the resonance peak. 
     
     
       14. The method of  claim 12  further comprising locating the series RLC circuit on the integrated circuit chip. 
     
     
       15. The method of  claim 12  further comprising placing the series RLC circuit in parallel with the capacitance associated with the integrated circuit chip. 
     
     
       16. The method of  claim 12  wherein the capacitance associated with the integrated circuit chip includes the one or more decoupling capacitors. 
     
     
       17. The method of  claim 12  further comprising implementing the capacitance component of the series RLC circuit with the one or more decoupling capacitors. 
     
     
       18. The method of  claim 12  further comprising implementing the resistance component of the series RLC circuit with a poly-resistor. 
     
     
       19. An integrated circuit structure, comprising:
 a package for an integrated circuit chip; 
 an integrated circuit chip connected to the package; 
 a power delivery path incorporated into the integrated circuit structure for receiving power from a power supply, wherein the impedance of the power delivery path exhibits at least one resonance peak at an operating frequency due to inductance and capacitance associated with the chip and package; and, 
 a series RLC circuit connected to the integrated circuit structure, wherein the series RLC circuit has resistance, inductance, and capacitance components and component values selected to reduce the resonance peak of the power delivery path impedance, and wherein the resistance component of the series RLC circuit is implemented with a conducting metal trace connected to one or more decoupling capacitors.