US7843011B2ActiveUtilityA1

Electronic device including insulating layers having different strains

68
Assignee: FREESCALE SEMICONDUCTOR INCPriority: Jan 31, 2007Filed: Jan 31, 2007Granted: Nov 30, 2010
Est. expiryJan 31, 2027(~0.6 yrs left)· nominal 20-yr term from priority
H10P 14/69433H10P 14/6927H10P 14/6339H10P 14/6329H10P 50/282H10W 10/181H10W 10/061H10P 90/1906H10D 30/60H10D 86/01H10D 30/792H10D 86/201
68
PatentIndex Score
2
Cited by
54
References
20
Claims

Abstract

An electronic device can include a field isolation region and a first insulating layer having a first strain and having a portion, which from a top view, lies entirely within the field isolation region. The electronic device can also include a second insulating layer having a second strain different from the first strain and including an opening. From a top view, the portion of the first insulating layer can lie within the opening in the second insulating layer. In one embodiment, the field isolation region can include a dummy structure and the portion of the first insulating layer can overlie the dummy structure. A process of forming the electronic device can include forming an island portion of an insulating layer wherein from a top view, the island portion lies entirely within the field isolation region.

Claims

exact text as granted — not AI-modified
1. An electronic device comprising:
 a field isolation region;
 a first active region lying immediately adjacent to the field isolation region, and including a p-channel transistor; 
 a second active region lying immediately adjacent to the field isolation region, and including an n-channel transistor; 
 
 a first insulating layer having a first strain and including a first portion overlying the field isolation region, wherein, from a top view, the first portion lies entirely within the field isolation region, and wherein a second portion of the first insulating layer overlies the p-channel transistor; and 
 a second insulating layer having a second strain different from the first strain and including an opening wherein, from a top view, the first portion of the first insulating layer lies within the opening in the second insulating layer, and wherein the second insulating layer overlies the n-channel transistor. 
 
     
     
       2. The electronic device of  claim 1 , wherein the first insulating layer and the second insulating layer include a nitride or an oxynitride. 
     
     
       3. The electronic device of  claim 1 , wherein:
 the first insulating layer has a compressive strain; and 
 the second insulating layer has a tensile strain. 
 
     
     
       4. The electronic device of  claim 1 , wherein from a top view, a shortest distance from the first portion of the first insulating layer to the second portion of the first insulating layer is at least approximately 2 microns. 
     
     
       5. The electronic device of  claim 1 , wherein a quotient of a first area of the first insulating layer divided by a second area of the second insulating layer is greater than approximately 0.2. 
     
     
       6. The electronic device of  claim 1 , wherein the first portion of the first insulating layer is spaced apart from all other portions of the first insulating layer. 
     
     
       7. The electronic device of  claim 1 , wherein the first and second insulating layers have substantially a same chemical composition. 
     
     
       8. The electronic device of  claim 1 , wherein:
 the field isolation region includes:
 an insulating region; and 
 a dummy structure; 
 
 the first insulating layer has a first edge; 
 the second insulating layer has a second edge; and 
 from a top view, the first edge and the second edge lie within the insulating region. 
 
     
     
       9. The electronic device of  claim 8 , further comprising an active region, wherein the active region and the dummy structure are formed from a same layer. 
     
     
       10. The electronic device of  claim 1 , wherein:
 the field isolation region includes a first dummy structure that includes a first portion of the substrate, a second dummy structure that includes a second portion of the substrate, and a third dummy structure that includes a third portion of the substrate, wherein the first, second, and third portions of the substrate are spaced apart from one another; 
 the first insulating layer includes a second portion and a third portion, wherein the first, second, and third portions of the first insulating layer are spaced apart from one other; and 
 the second insulating layer includes a first portion, wherein the first and second portions of the first insulating layer and the first portion of the second insulating layer are spaced apart from one other; and 
 the first portion of the first insulating layer overlies the first dummy structure, the second portion of the first insulating layer overlies the second dummy structure, and the first portion of the second insulating layer overlies the third dummy structure. 
 
     
     
       11. The electronic device of  claim 10 , wherein from a top view:
 the first portion of the first insulating layer completely covers the first dummy structure; 
 the second portion of the first insulating layer completely covers the second dummy structure; and 
 the first portion of the second insulating layer completely covers the third dummy structure. 
 
     
     
       12. An electronic device comprising:
 a substrate; 
 an active region; 
 a field isolation region overlying the substrate and adjacent to the active region,
 wherein the field isolation region includes: 
 a first dummy structure including a first portion of the substrate; and 
 a second dummy structure including a second portion of the substrate; 
 
 a first insulating layer overlying the first dummy structure and not the second dummy structure, wherein the first insulating layer has a first strain; and 
 a second insulating layer overlying the second dummy structure and not the first dummy structure, wherein the second insulating layer has a second strain different from the first strain, and from a top view:
 the first insulating layer lies within an opening in the second insulating layer; and 
 substantially none of the active region lies within the opening. 
 
 
     
     
       13. The electronic device of  claim 12 , wherein from a top view, the first dummy structure lies within the opening in the second insulating layer. 
     
     
       14. The electronic device of  claim 12 , wherein from a top view:
 the field isolation region further includes an insulating region surrounding the first dummy structure and the second dummy structure; 
 the first insulating layer has a first edge; 
 the second insulating layer has a second edge; and 
 the first edge and the second edge overlie the insulating region. 
 
     
     
       15. The electronic device of  claim 12 , wherein the first insulating layer and the second insulating layer have a substantially same chemical composition. 
     
     
       16. The electronic device of  claim 12 , wherein the first portion of the first insulating layer is spaced apart from all other portions of the first insulating layer. 
     
     
       17. The electronic device of  claim 12 , wherein the first and second insulating layer have substantially a same chemical composition. 
     
     
       18. The electronic device of  claim 12 , wherein from a top view:
 the first insulating layer completely covers the first dummy structure; and 
 the second insulating layer completely covers the second dummy structure. 
 
     
     
       19. The electronic device of  claim 12 , wherein:
 the first insulating layer overlies the active region; and 
 the active region includes a p-channel transistor. 
 
     
     
       20. The electronic device of  claim 19 , wherein a shortest distance from the first dummy structure to the active region is longer than a shortest distance from the second dummy structure to the active region.

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