Semiconductor device having increased switching speed

Abstract

A semiconductor device is formed in a thin float zone wafer. Junctions are diffused into the top surface of the wafer and the wafer is then reduced in thickness by removal of material from its bottom surface. A weak collector is then formed in the bottom surface by diffusion of boron (for a P type collector). The weak collector is then formed or activated only over spaced or intermittent areas. This is done by implant of the collector impurity through a screening mask; or by activating only intermittent areas by a laser beam anneal in which the beam is directed to anneal only preselected areas. The resulting device has an effective very low implant dose, producing a reduced switching energy and increased switching speed, as compared to prior art weak collector/anodes and life time killing technologies.

1. A method of manufacturing a semiconductor device comprising:
 forming at least three spaced activated weak collector segments in one side of a semiconductor die of one conductivity, wherein the dose used for each individual segment is in excess of about 5E11 atoms/cm 2 ; 
 wherein said semiconductor die is comprised of float zone type silicon; and 
 wherein said segments are formed in a plurality of rows, wherein said plurality of spaced activated weak collector segments are formed by implanting dopants of another conductivity through a screen comprised of a Ni foil. 
 
     
     
       2. A method according to  claim 1 , wherein said plurality of activated weak collector segments are formed by a full area, continuous implant, and selective activation of spaced regions by a controlled laser beam heat source. 
     
     
       3. A method according to  claim 1 , wherein said semiconductor die is less than 250 microns thick. 
     
     
       4. A method according to  claim 1 , wherein said segments are activated, and thereafter a contact layer is formed on said one side. 
     
     
       5. A method according to  claim 1 , further comprising forming a plurality of DMOS structure in a surface opposite said one side of said semiconductor die. 
     
     
       6. A method according to  claim 1 , wherein each segment occupies an area of about 50×50 microns, and said segments are spaced 50 to 200 microns apart. 
     
     
       7. A method according to  claim 1 , wherein each segment is about 0.5 microns deep. 
     
     
       8. The process of manufacture of a semiconductor die; said process comprising the steps of:
 a) forming a plurality of junctions in the top surface of a float zone silicon wafer; 
 b) forming a top electrode over the top surface of said wafer and in contact with selected ones of said junctions; 
 c) thinning said wafer to a thickness less than about 250 microns by removing material from the bottom of said wafer; 
 d) forming a plurality of spaced activatable weak injection anode type regions by an ion beam of particles of a conductivity type opposite to that of impurity carriers in said wafer through a masking screen to define said spaced weak anode regions in said bottom of said wafer; 
 e) applying an aluminum electrode layer across the full area of said bottom surface of said wafer; and 
 f) activating said spaced activatable anode type regions. 
 
     
     
       9. The process of  claim 8 , in which said junctions are DMOS junctions and said semiconductor die is an 1 GBT. 
     
     
       10. The process of  claim 8 , wherein said weak anode type regions are activated by an activation anneal after the application of an electrode to said bottom surface. 
     
     
       11. The process of  claim 10 , in which said junctions are DMOS junctions and said semiconductor die is an IGBT. 
     
     
       12. The process of  claim 8 , wherein said weak anode type regions are activated by sweeping an annealing laser beam over the surface of the bottom of said wafer and heating and annealing said spaced activatable weak anode type regions. 
     
     
       13. A method of manufacturing a semiconductor device comprising:
 forming a plurality of spaced activated weak collector segments in one side of a semiconductor die of one conductivity, wherein the dose used for each individual segment is in excess of about 5E11 atoms/cm 2 ; and 
 wherein said plurality of spaced activated weak collector segments are formed by implanting dopants of another conductivity though a screen comprised of a Ni foil.