US8365401B2ActiveUtilityA1

Circuit board and manufacturing method thereof

68
Assignee: UNIMICRON TECHNOLOGY CORPPriority: Nov 17, 2009Filed: Mar 26, 2010Granted: Feb 5, 2013
Est. expiryNov 17, 2029(~3.4 yrs left)· nominal 20-yr term from priority
H10W 70/6565H05K 3/465H05K 2203/0723H05K 2203/0384Y10T29/49155H05K 3/0038H05K 3/06
68
PatentIndex Score
2
Cited by
3
References
10
Claims

Abstract

A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate.

Claims

exact text as granted — not AI-modified
1. A method of manufacturing a circuit board, comprising:
 providing a circuit substrate having a first surface and at least one first circuit; 
 forming a dielectric layer on the circuit substrate, and the dielectric layer covering the first surface and the at least one first circuit, wherein the dielectric layer has a second surface and a metal layer and a barrier layer covering the metal layer are formed on the second surface; 
 irradiating the barrier layer with a laser beam to form an intaglio pattern extending from the barrier layer to the second surface of the dielectric layer and at least one blind via extending to the at least one first circuit of the circuit substrate; 
 forming a first conductive layer within the intaglio pattern, the at least one blind via, and the barrier layer; 
 forming a second conductive layer on the first conductive layer; and 
 removing a portion of the second conductive layer, the barrier layer, the metal layer, and a portion of the first conductive layer to form a patterned circuit structure and expose the second surface of the dielectric layer, wherein the patterned circuit structure is disposed within the intaglio pattern and the blind via and electrically connected to the at least one first circuit of the circuit substrate. 
 
     
     
       2. The method of manufacturing the circuit board as claimed in  claim 1 , wherein the circuit substrate further comprises a first intaglio pattern disposed on the first surface and the first circuit is disposed within the first intaglio pattern. 
     
     
       3. The method of manufacturing the circuit board as claimed in  claim 1 , wherein a method of forming the metal layer comprises performing an electroless plating process. 
     
     
       4. The method of manufacturing the circuit board as claimed in  claim 1 , wherein a material of the barrier layer comprises nickel, tin, chromium, zinc, or gold. 
     
     
       5. The method of manufacturing the circuit board as claimed in  claim 1 , wherein the intaglio pattern comprises a second intaglio pattern and a third intaglio pattern, the third intaglio pattern is connected to the at least one blind via, the patterned circuit structure comprises at least one second circuit and a plurality of third circuits, the at least one second circuit is disposed within the second intaglio pattern, the plurality of third circuits is disposed within the third intaglio pattern and the at least one blind via, a line width of the at least one second circuit is thinner than a line width of each of the plurality of third circuits, and at least one of the plurality of third circuits is electrically connected to the at least one first circuit of the circuit substrate. 
     
     
       6. The method of manufacturing the circuit board as claimed in  claim 5 , wherein before the second conductive layer is formed on the first conductive layer, the first conductive layer fills the second intaglio pattern to form the second circuit of the patterned circuit structure. 
     
     
       7. The method of manufacturing the circuit board as claimed in  claim 1 , wherein a method of forming the first conductive layer comprises performing an electroless plating process. 
     
     
       8. The method of manufacturing the circuit board as claimed in  claim 1 , wherein a method of forming the second conductive layer comprises performing an electroplating process. 
     
     
       9. The method of manufacturing the circuit board as claimed in  claim 1 , wherein the step of removing a portion of the second conductive layer, the barrier layer, the metal layer, and a portion of the first conductive layer comprises:
 performing a first etching process to remove a portion of the second conductive layer and a portion of the first conductive layer until the barrier layer is exposed; 
 performing a second etching process to remove the barrier layer until the metal layer is exposed; and 
 performing a third etching process to remove the metal layer until the second surface of the dielectric layer is exposed. 
 
     
     
       10. The method of manufacturing the circuit board as claimed in  claim 9 , wherein before performing the second etching process, a polishing process is further performed to the barrier layer.

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