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US8426224B2ActiveUtilityPatentIndex 81

Nanowire array-based light emitting diodes and lasers

Assignee: WANG DELIPriority: Dec 18, 2006Filed: Dec 18, 2007Granted: Apr 23, 2013
Est. expiryDec 18, 2026(~0.5 yrs left)· nominal 20-yr term from priority
Inventors:WANG DELIBAO XINYUXIANG BINSOCI CESAREAPLIN DAVID
H10H 20/821H10H 20/818B82Y 20/00B82Y 30/00H01S 5/423H01S 5/183H01S 5/1042
81
PatentIndex Score
9
Cited by
18
References
22
Claims

Abstract

Semiconductor nanowire arrays are used to replace the conventional planar layered construction for fabrication of LEDs and laser diodes. The nanowire arrays are formed from III-V or II-VI compound semiconductors on a conducting substrate. For fabrication of the device, an electrode layer is deposited on the substrate, a core material of one of a p-type and n-type compound semiconductor material is formed on top of the electrode as a planar base with a plurality of nanowires extending substantially vertically therefrom. A shell material of the other of the p-type and n-type compound semiconductor material is formed over an outer surface of the core material so that a p-n junction is formed across the planar base and over each of the plurality of nanowires. An electrode coating is formed an outer surface of the shell material for providing electrical contact to a current source. Heterostructures and superlattices grown along the lengths of the nanowires allow the confinement of photons in the quantum well to enhance the efficiency and as well as color tuning.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A method for fabricating a solid state lighting device, comprising:
 selecting a conductive substrate; 
 depositing an electrode layer on a surface of the substrate; 
 forming a core material comprising one of a p-type and n-type compound semiconductor material on top of the electrode as a planar base with a plurality of nanowires extending substantially vertically therefrom; 
 forming a shell material comprising the other of the p-type and n-type compound semiconductor material over an outer surface of the core material so that a p-n junction is defined across the planar base and over each of the plurality of nanowires; and 
 forming an electrode coating over an outer surface of the shell material for providing electrical contact to a current source, wherein one of the electrode coating and electrode layer receives a current from the current source to cause the solid state lighting device to emit light; and
 wherein the p-type compound semiconductor is p-type ZnO formed by chemical vapor deposition using a source mixture comprising zinc oxide powder, graphite powder and a phosphorous source; and 
 injecting a carrier gas through the source mixture while the furnace temperature is elevated for a predetermined period of time until nanowires of a pre-determined size are formed. 
 
 
     
     
       2. The method of  claim 1 , further comprising defining at least one superlattice structure along a length of each of the plurality of nanowires by, during formation of the core material, periodically adding a source material to produce alternating differentially doped semiconductor layers. 
     
     
       3. The method of  claim 1 , further comprising forming additional layers over the shell material, prior to forming the electrode coating, to create at least one intrinsic layer, quantum well, or superlattice structure disposed in a radial direction of each of the plurality of nanowires. 
     
     
       4. The method of  claim 1 , wherein the phosphorous source is phosphorous pentaoxide. 
     
     
       5. The method of  claim 1 , wherein the phosphorous source is zinc phosphide. 
     
     
       6. The method of  claim 1 , further comprising annealing the nanowires in nitrogen gas. 
     
     
       7. The method of  claim 1 , wherein the carrier gas is an oxygen-nitrogen mixture. 
     
     
       8. A method for fabricating a p-type zinc oxide nanowire array, comprising:
 providing a source mixture of zinc oxide, carbon and a phosphorous dopant; 
 disposing a substrate in a furnace downstream from the source mixture; 
 injecting a carrier gas into the furnace; and 
 elevating the furnace temperature to a deposition temperature for a predetermined period of time until nanowires of a predetermined size are formed on the substrate. 
 
     
     
       9. The method of  claim 8 , wherein the carbon is a graphite powder. 
     
     
       10. The method of  claim 8 , wherein the phosphorous dopant is phosphorous pentaoxide. 
     
     
       11. The method of  claim 8 , wherein the phosphorous dopant is zinc phosphide. 
     
     
       12. The method of  claim 8 , further comprising annealing the nanowires in nitrogen gas. 
     
     
       13. The method of  claim 8 , wherein the carrier gas is an oxygen-nitrogen mixture. 
     
     
       14. The method of  claim 8 , wherein the substrate comprises sapphire. 
     
     
       15. The method of  claim 8 , wherein the substrate comprises a-plane sapphire. 
     
     
       16. The method of  claim 8 , further comprising, during the step of injecting, periodically adding an additional source material to produce alternating differentially doped semiconductor layers. 
     
     
       17. A method for fabricating a p-type zinc oxide nanowire array, comprising:
 disposing a source mixture of zinc oxide powder, graphite powder and a phosphorous-containing powder in a source boat in a furnace; 
 disposing a substrate in the furnace downstream from the source boat; 
 injecting a carrier gas into the furnace; and 
 elevating the furnace temperature to a deposition temperature for a predetermined period of time until nanowires of a predetermined size are formed on the substrate. 
 
     
     
       18. The method of  claim 17 , wherein the phosphorous-containing powder is phosphorous pentaoxide. 
     
     
       19. The method of  claim 17 , wherein the phosphorous-containing powder is zinc phosphide. 
     
     
       20. The method of  claim 17 , further comprising annealing the nanowires in nitrogen gas. 
     
     
       21. The method of  claim 17 , wherein the carrier gas is an oxygen-nitrogen mixture. 
     
     
       22. The method of  claim 17 , wherein the substrate comprises sapphire.

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