Nonvolatile memory element, nonvolatile memory device, nonvolatile semiconductor device, and method of manufacturing nonvolatile memory element

Abstract

A nonvolatile memory element comprises a first electrode ( 103 ); a second electrode ( 105 ); and a resistance variable layer ( 104 ) disposed between the first electrode ( 103 ) and the second electrode ( 105 ), resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the electrodes ( 103, 105 ); the resistance variable layer ( 104 ) including a first tantalum oxide layer ( 107 ) comprising a first tantalum oxide and a second tantalum oxide layer ( 108 ) comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaO x and x<y≦2.5 is satisfied when the second tantalum oxide is expressed as TaO y ; and the second electrode ( 105 ) being in contact with the second tantalum oxide layer ( 108 ) and comprising platinum and tantalum.

The invention claimed is: 
     
       1. A nonvolatile memory element comprising:
 a first electrode; 
 a second electrode; and 
 a resistance variable layer disposed between the first electrode and the second electrode, resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the first electrode and the second electrode; 
 the resistance variable layer including a first tantalum oxide layer comprising a first tantalum oxide and a second tantalum oxide layer comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaO x  and x<y≦2.5 is satisfied when the second tantalum oxide is expressed as TaO y ; 
 the second electrode being in contact with the second tantalum oxide layer and comprising platinum and tantalum; and 
 the second electrode having a platinum content which is not less than 27 atm % and not more than 92 atm %. 
 
     
     
       2. The nonvolatile memory element according to  claim 1 , wherein the second electrode includes an alloy of platinum and tantalum, and a platinum content in the alloy is not less than 27 atm % and not more than 92 atm %. 
     
     
       3. The nonvolatile memory element according to  claim 1 , wherein the second electrode has a platinum content which is not less than 56 atm % and not more than 92 atm %. 
     
     
       4. The nonvolatile memory element according to  claim 3 , wherein when a thickness of the second tantalum oxide layer is Y(nm), an upper limit value of the platinum content of the second electrode is a value expressed as [3.65Y+60.7] (atm %). 
     
     
       5. A nonvolatile memory device comprising:
 a semiconductor substrate; and 
 a memory array including a plurality of first wires formed on the semiconductor substrate to extend in parallel with each other; a plurality of second wires formed above the plurality of first wires to extend in parallel with each other within a plane parallel to a main surface of the semiconductor substrate and to three-dimensionally cross the plurality of first wires, respectively; nonvolatile memory elements which are provided to respectively correspond to three-dimensional cross points of the plurality of first wires and the plurality of second wires; and current controlling elements having a non-linear current-voltage characteristic; 
 each of the nonvolatile memory elements including: 
 a first electrode disposed between a corresponding one of the first wires and a corresponding one of the second wires and electrically connected to the first wire; a second electrode disposed between the corresponding one of the first wires and the corresponding one of the second wires and electrically connected to the second wire; and a resistance variable layer disposed between the first electrode and the second electrode, resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the first electrode and the second electrode; 
 the resistance variable layer including a first tantalum oxide layer comprising a first tantalum oxide and a second tantalum oxide layer comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaO x  and x<y≦2.5 is satisfied when the second tantalum oxide is expressed as TaO y ; 
 the second electrode being in contact with the second tantalum oxide layer and comprising platinum and tantalum, and 
 the second electrode having a platinum content which is not less than 27 atm % and not more than 92 atm %. 
 
     
     
       6. The nonvolatile memory device according to  claim 5 , wherein the second electrode includes an alloy of platinum and tantalum, and a platinum content in the alloy is not less than 27 atm % and not more than 92 atm %. 
     
     
       7. The nonvolatile memory device according to  claim 5 , wherein the second electrode has a platinum content which is not less than 56 atm % and not more than 92 atm %. 
     
     
       8. The nonvolatile memory device according to  claim 7 , wherein when a thickness of the second tantalum oxide layer is Y(nm), an upper limit value of the platinum content of the second electrode is a value expressed as [3.65Y+60.7] (atm %). 
     
     
       9. The nonvolatile memory device according to  claim 5 , comprising a multi-layer memory array in which a plurality of layers of the memory array are stacked together on the semiconductor substrate. 
     
     
       10. A nonvolatile memory device comprising:
 a semiconductor substrate; 
 a plurality of word lines formed on the semiconductor substrate to extend in parallel with each other; 
 a plurality of bit lines formed to extend in parallel with each other and arranged to three-dimensionally cross the plurality of word lines, respectively; 
 a plurality of plate lines formed to extend in parallel with each other and arranged in parallel with either the plurality of word lines or the plurality of bit lines; 
 a plurality of transistors provided to respectively correspond to three-dimensional cross points of the plurality of word lines and the plurality of bit lines, respectively; and 
 a plurality of nonvolatile memory elements provided to respectively correspond to the plurality of transistors such that one nonvolatile memory element corresponds to one transistor; 
 each of the plurality of nonvolatile memory elements including a first electrode, a second electrode, and a resistance variable layer disposed between the first electrode and the second electrode, resistance values of the resistance variable layer changing reversibly in response to electric signals applied between a corresponding one of the bit lines and a corresponding one of the plate lines and applied between the first electrode and the second electrode via a corresponding one of the transistors; 
 one of the first electrode and the second electrode of the nonvolatile memory element being connected to one of a source and a drain of a corresponding one of the transistors; 
 gates of the plurality of transistors being connected to corresponding ones of the word lines, respectively; 
 the other of the first electrode and the second electrode of the nonvolatile memory element being connected to one of either a corresponding one of the bit lines or a corresponding one of the plate lines; 
 the other of the source and the drain of the transistor is connected to the other of either the corresponding one of the bit lines or the corresponding one of the plate lines; 
 the resistance variable layer including a first tantalum oxide layer comprising a first tantalum oxide and a second tantalum oxide layer comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaO x  and x<y≦2.5 is satisfied when the second tantalum oxide is expressed as TaO y ; 
 the second electrode being in contact with the second tantalum oxide layer and comprising platinum and tantalum; and 
 the second electrode having a platinum content which is not less than 27 atm % and not more than 92 atm %. 
 
     
     
       11. The nonvolatile semiconductor device according to  claim 10 , wherein the second electrode includes an alloy of platinum and tantalum, and a platinum content in the alloy is not less than 27 atm % and not more than 92 atm %. 
     
     
       12. The nonvolatile memory device according to  claim 10 , wherein the second electrode has a platinum content which is not less than 56 atm % and not more than 92 atm %. 
     
     
       13. The nonvolatile memory device according to  claim 12 , wherein when a thickness of the second tantalum oxide layer is Y(nm), an upper limit value of the platinum content of the second electrode is a value expressed as [3.65Y+60.7] (atm %). 
     
     
       14. A nonvolatile semiconductor device comprising:
 a semiconductor substrate; 
 a logic circuit provided on the semiconductor substrate, for executing predetermined calculation; and 
 a nonvolatile memory element provided on the semiconductor substrate and having a programming function; 
 the nonvolatile memory element comprising: 
 a first electrode; 
 a second electrode; and 
 a resistance variable layer disposed between the first electrode and the second electrode, resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the first electrode and the second electrode; 
 the resistance variable layer including a first tantalum oxide layer comprising a first tantalum oxide and a second tantalum oxide layer comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaO x  and x<y≦2.5 is satisfied when the second tantalum oxide is expressed as TaO y ; 
 the second electrode being in contact with the second tantalum oxide layer and comprising platinum and tantalum; and 
 the second electrode having a platinum content which is not less than 27 atm % and not more than 92 atm %. 
 
     
     
       15. The nonvolatile semiconductor device according to  claim 14 , wherein the second electrode includes an alloy of platinum and tantalum, and a platinum content in the alloy is not less than 27 atm % and not more than 92 atm %. 
     
     
       16. The nonvolatile semiconductor device according to  claim 14 , wherein the second electrode has a platinum content which is not less than 56 atm % and not more than 92 atm %. 
     
     
       17. The nonvolatile semiconductor device according to  claim 16 , wherein when a thickness of the second tantalum oxide layer is Y(nm), an upper limit value of the platinum content of the second electrode is a value expressed as [3.65Y+60.7] (atm %). 
     
     
       18. A method of manufacturing a nonvolatile memory element including:
 a first electrode; 
 a second electrode; and 
 a resistance variable layer disposed between the first electrode and the second electrode, resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the first electrode and the second electrode; 
 the resistance variable layer including a first tantalum oxide layer comprising a first tantalum oxide and a second tantalum oxide layer comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaO x  and x<y≦2.5 is satisfied when the second tantalum oxide is expressed as TaO y ; 
 the second electrode being in contact with the second tantalum oxide layer and comprising platinum and tantalum; and 
 the second electrode having a platinum content which is not less than 27 atm % and not more than 92 atm %; 
 the method comprising: 
 forming the second electrode by cosputtering using a platinum target and a tantalum target, a composition of the second electrode comprising the platinum and the tantalum being controlled by regulating a power intensity applied to each of the targets. 
 
     
     
       19. A method of manufacturing a nonvolatile memory element including:
 a first electrode; 
 a second electrode; and 
 a resistance variable layer disposed between the first electrode and the second electrode, resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the first electrode and the second electrode; 
 the resistance variable layer including a first tantalum oxide layer comprising a first tantalum oxide and a second tantalum oxide layer comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaO x  and x<y≦2.5 is satisfied when the second tantalum oxide is expressed as TaO y ; 
 the second electrode being in contact with the second tantalum oxide layer and comprising platinum and tantalum, and 
 the second electrode having a platinum content which is not less than 27 atm % and not more than 92 atm %, 
 the method comprising: 
 forming a material of the second electrode comprising the platinum and the tantalum by sputtering using a target comprising alloy composed of the platinum and the tantalum.