US8587122B2ActiveUtilityPatentIndex 48
Semiconductor flip-chip system having three-dimensional solder joints
Est. expiryAug 29, 2031(~5.1 yrs left)· nominal 20-yr term from priority
Inventors:MAWATARI KAZUAKI
H10W 90/724H10W 90/722H10W 90/297H10W 72/932H10W 72/252H10W 72/241H10W 72/222H10W 72/221H10W 72/072H10W 72/29H10W 20/20H10W 90/00H10W 20/43H10W 70/65
48
PatentIndex Score
0
Cited by
5
References
14
Claims
Abstract
A solder joint between a trace ( 401 ) and an object ( 501 ). The trace having a solderable surface ( 503 ), a height ( 504 ), and a width ( 404 ), the trace including a bulge having a diameter ( 502 ) greater than the trace width, a surface area, and sidewalls, the sum of the bulge sidewall areas being no less than the bulge surface area. The object having a solderable surface ( 503 ), a diameter ( 502 ) greater than the trace width. One end of the object soldered to the bulge, wherein the solder ( 610, 611, 612 ) adheres to the bulge surface area and the bulge sidewall areas.
Claims
exact text as granted — not AI-modifiedI claim:
1. An apparatus comprising:
a trace having a solderable surface, a height, and a width, the trace including a bulge having a diameter greater than the trace width, a surface area, and sidewalls, the sum of the bulge sidewall areas being no less than the bulge surface area and wherein at least a portion of the bulge surface area has a meandrous contour; and
a solderable object having a diameter greater than the trace width, one end of the object soldered to the bulge, wherein the solder adheres to the bulge surface area and to the bulge sidewall areas.
2. The apparatus of claim 1 wherein the sum of the bulge side wall areas is no less than the bulge surface area.
3. The apparatus of claim 1 wherein the trace height is about equal to the trace width.
4. The apparatus of claim 3 wherein the trace is an electrical conductor.
5. The apparatus of claim 4 wherein the trace includes copper.
6. The apparatus of claim 5 wherein the trace is supported by a semiconductor integrated circuit chip.
7. The apparatus of claim 6 wherein the chip includes metal-filled through-silicon-vias.
8. The apparatus of claim 1 wherein the diameter of the object is no less than the diameter of the bulge.
9. The apparatus of claim 1 wherein the object is shaped as an electrically conductive bump with a diameter.
10. The apparatus of claim 1 wherein the object is shaped as an elongated, electrically conductive pillar with a diameter.
11. The apparatus of claim 10 wherein the object is the metallic core of a metal-filled TSV (through-silicon-via).
12. The apparatus of claim 1 wherein the opposite end of the object is attached to a bond pad of a semiconductor chip.
13. An apparatus comprising:
a trace having a solderable surface, a height, and a width, the trace including a bulge having a diameter greater than the trace width, a surface area, and sidewalls, the sum of the bulge sidewall areas being no less than the bulge surface area, wherein the trace is supported by a semiconductor integrated circuit chip having metal-filled through-silicon-vias; and
a solderable object having a diameter greater than the trace width, one end of the object soldered to the bulge, wherein the solder adheres to the bulge surface area and to the bulge sidewall areas.
14. An apparatus comprising:
a trace having a solderable surface, a height, and a width, the trace including a bulge having a diameter greater than the trace width, a surface area, and sidewalls, the sum of the bulge sidewall areas being no less than the bulge surface area; and
a solderable metallic core of a metal-filled TSV (through-silicon-via) having a diameter greater than the trace width, one end of the metallic core of a metal-filled TSV (through-silicon-via) soldered to the bulge, wherein the solder adheres to the bulge surface area and to the bulge sidewall areas.Cited by (0)
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