Semiconductor device with a gate electrode having a shape formed based on a slope and gate lower opening and method of manufacturing the same

Abstract

A semiconductor device has a semiconductor region including a gate electrode disposed over the semiconductor region, a first electrode portion, a second electrode portion standing substantially perpendicular to a surface of the semiconductor region and a substantially constant dimension in a direction parallel to the surface of the semiconductor region. The semiconductor device has a tapered portion disposed between the first electrode portion and the second electrode portion and has a dimension parallel to the surface of the semiconductor region increasing in the direction from the second electrode portion to the first electrode portion. Further, the semiconductor device includes a source and a drain electrode at both sides of the gate electrode over the semiconductor region and an insulating layer that covers a portion of the surface of the semiconductor region. Additionally, the second electrode portion may be positioned closer to one of the drain electrode and the source electrode.

What is claimed is: 
     
       1. A semiconductor device comprising:
 a semiconductor region; 
 a gate electrode disposed over the semiconductor region, including a first electrode portion, a second electrode portion standing substantially perpendicular to a surface of the semiconductor region and having a substantially constant dimension in a direction parallel to the surface of the semiconductor region, and a tapered portion disposed between the first electrode portion and the second electrode portion and having a dimension parallel to the surface of the semiconductor region increasing in the direction from the second electrode portion to the first electrode portion; 
 a source and a drain electrode at both sides of the gate electrode over the semiconductor region; and 
 an insulating layer covering at least a portion of the surface of the semiconductor region, 
 wherein the second electrode portion of the gate electrode is disposed at a position closer to one of the drain electrode and the source electrode. 
 
     
     
       2. The semiconductor device according to  claim 1 , wherein a dimension L of the second electrode portion parallel to the surface of the semiconductor region and a height H of the tapered portion perpendicular to the surface of the semiconductor region have an aspect ratio satisfying a relationship H/L≦2.75. 
     
     
       3. The semiconductor device according to  claim 2 , wherein the tapered portion has an inclination of about 70° or less with respect to a direction parallel to the surface of the semiconductor region. 
     
     
       4. The semiconductor device according to  claim 1 , wherein when a dimension L of the second electrode portion parallel to the surface of the semiconductor region is 100 nm or less, the first electrode portion has an aspect ratio satisfying the relationship H 2 /L≧1.0, wherein H 2  represents the height of the second electrode portion perpendicular to the surface of the semiconductor region. 
     
     
       5. The semiconductor device according to  claim 1 , wherein the gate electrode is in a T shape or a mushroom shape. 
     
     
       6. The semiconductor device according to  claim 1 , wherein the gate electrode is disposed on the semiconductor region and the side surfaces of the second electrode portion are in contact with the insulating layer. 
     
     
       7. The semiconductor device according to  claim 1 , wherein the gate electrode is disposed on the insulating layer. 
     
     
       8. The semiconductor device according to  claim 1 , wherein the insulating layer is made of a material selected from the group consisting of oxides, nitrides, and High-k dielectrics. 
     
     
       9. The semiconductor device according to  claim 1 , wherein the insulating layer is made of a material selected from the group consisting of SiO 2 , SiN, HfSiO, HfAION, HfO 2 , and Y 2 O 3 .