Bipolar transistor with embedded epitaxial external base region and method of forming the same

Abstract

The present invention discloses a bipolar transistor with an embedded epitaxial external base region, which is designed to solve the problem of the TED effect with the prior art structures. The bipolar transistor with an embedded epitaxial external base region of the present invention comprises at least a collector region, a base region and an external base region on the collector region, an emitter on the base region, and sidewalls at both sides of the emitter. The external base region is grown through an in-situ doping selective epitaxy process and is embedded in the collector region. A portion of the external base region is located beneath the sidewalls. The present invention discloses a method of forming a bipolar transistor with an embedded epitaxial external base region. The bipolar transistor with an embedded epitaxial external base region of the present invention avoids the TED effect and reduces the resistance of the external base region of the device so that the performance of the device is improved. The method of forming a bipolar transistor with an embedded epitaxial external base region of the present invention achieves the aforesaid bipolar transistor with an embedded epitaxial external base region, and features concise steps, a low cost and simple operations, and the structure obtained has good performance.

What is claimed is: 
     
       1. A method of forming a bipolar transistor with an embedded epitaxial external base region, comprising at least the following steps:
 3.1 forming a collector region of a first doping type; 
 3.2 forming a base region of a second doping type on the resulting structure of the step 3.1; 
 3.3 depositing a first dielectric layer on the base region; 
 3.4 opening a window in the first dielectric layer; 
 3.5 forming a polycrystalline layer of the first doping type and a second dielectric layer in sequence on the resulting structure of the step 3.4; 
 3.6 etching the second dielectric layer and the polycrystalline layer through photolithography to form an emitter, and removing exposed portions of the first dielectric layer; 
 3.7 depositing a third dielectric layer and forming a sidewall structure on a side surface of the resulting emitter structure through an anisotropic etching process; 
 3.8 etching portions of the base region that are not covered in the resulting structure of the step 3.7 by using the emitter and the sidewall structure as a mask, with an etching thickness being greater than a thickness of the base region; 
 3.9 forming an external base region of the second doping type on the resulting structure of the step 3.8 through an in-situ doping selective epitaxy process; 
 3.10 forming a layer of metal silicide structure on a surface of the external base region; and 
 3.11 forming a contact hole on the resulting structure of the step 3.10 to lead out an electrode of the emitter and an electrode of the base region. 
 
     
     
       2. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 1 , wherein the polycrystalline layer of the step 3.5 is a polysilicon layer or a poly-SiGe layer, and the dielectric layers are formed of silicon oxide or silicon nitride. 
     
     
       3. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 1 , wherein the etching thickness of the step 3.8 ranges between 10 nm and 2000 nm, and the sidewall is undercut during the etching of the base region. 
     
     
       4. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 1 , wherein the base region is formed of silicon (Si), SiGe or carbon-doped SiGe. 
     
     
       5. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 1 , wherein the first dielectric layer is a composite dielectric layer, which comprises a silicon oxide layer deposited on a surface of the base region and a silicon nitride layer deposited on a surface of the silicon oxide layer. 
     
     
       6. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 1 , wherein the external base region is formed through an epitaxy growth process, the external base region is formed of Si, SiGe or carbon-doped SiGe, and the impurity is doped at a concentration of 1E19 to 1 E21 cm −3 . 
     
     
       7. A method of forming a bipolar transistor with an embedded epitaxial external base region, comprising at least the following steps:
 6.1 forming a collector region of a first doping type; 
 6.2 forming a base region of a second doping type on the resulting structure of the step 6.1; 
 6.3 forming a first dielectric layer on the base region; 
 6.4 removing exposed portions of the first dielectric layer through photolithography to form a sacrifice emitter; 
 6.5 etching portions of the base region that are not covered by the sacrifice emitter, with an etching thickness being greater than a thickness of the base region; 
 6.6 forming an external base region of the second doping type on the resulting structure of the step 6.5; 
 6.7 depositing a second dielectric layer to form a planarized surface that exposes a top surface of the sacrifice emitter; 
 6.8 removing portions of a surface layer of the sacrifice emitter to obtain a window, and forming an inner sidewall structure on an inner sidewall of the window; 
 6.9 removing portions of the sacrifice emitter which are not covered by the inner sidewall; 
 6.10 depositing a polycrystalline layer; 
 6.11 removing edge portions of the polycrystalline layer of the step 6.10 and the second dielectric layer of the step 6.7 to form an emitter; 
 6.12 depositing a metal material on surfaces of the external base region and the emitter to form a metal silicide; and 
 6.13 forming a contact hole on the resulting structure of the step 6.12 to lead out an electrode of the emitter and an electrode of the base region. 
 
     
     
       8. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 7 , wherein the base region is formed of silicon (Si), SiGe or carbon-doped SiGe. 
     
     
       9. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 7 , wherein the first dielectric layer is a composite dielectric layer, which comprises a silicon oxide layer deposited on a surface of the base region and a silicon nitride layer deposited on a surface of the silicon oxide layer. 
     
     
       10. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 7 , wherein the sidewall is undercut during the etching of the base region. 
     
     
       11. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 7 , wherein the metal deposited is one of Ti, Co or Ni. 
     
     
       12. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 7 , wherein the external base region is formed through an epitaxy growth process, the external base region is formed of Si, SiGe or carbon-doped SiGe, and the impurity is doped at a concentration of 1E19 to 1 E21 cm −3 . 
     
     
       13. A method of forming a bipolar transistor with an embedded epitaxial external base region, comprising at least the following steps:
 9.1 forming a collector region of a first doping type; 
 9.2 forming a base region of a second doping type on the resulting structure of the step 9.1; 
 9.3 depositing a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer in sequence on the resulting structure of the step 9.2; 
 9.4 opening a window in the second silicon oxide layer and the silicon nitride layer; 
 9.5 removing portions of the first silicon oxide layer that are within the window to expose the base region and to form an emitter window; 
 9.6 depositing a polycrystalline layer on the resulting structure of the step 9.5; 
 9.7 planarizing the resulting structure of the step 9.6 to expose the second silicon oxide layer; 
 9.8 removing the second silicon oxide layer and portions of the silicon nitride layer that are not covered by the polycrystalline layer; 
 9.9 forming a first sidewall on a side surface of the polycrystalline layer, and removing portions of the first silicon oxide layer that are not covered by the first sidewall; 
 9.10 etching portions of the base region that are not covered, with an etching thickness being greater than a thickness of the base region; 
 9.11 forming an external base region of the second doping type on the resulting structure of the step 9.10; 
 9.12 depositing a dielectric layer to form a second sidewall outside the first sidewall; 
 9.13 depositing a metal layer on the resulting structure of the step 9.12, forming a metal silicide on the external base region and forming a metal silicide on the polycrystalline layer; and 
 9.14 forming a contact hole on the resulting structure of the step 9.13 to lead out an electrode of the emitter and an electrode of the base region. 
 
     
     
       14. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 13 , wherein the base region is made of Si or SiGe. 
     
     
       15. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 13 , wherein the sidewall is undercut during the etching of the base region. 
     
     
       16. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 13 , wherein the metal deposited is one of Ti, Co or Ni. 
     
     
       17. The method of forming a bipolar transistor with an embedded epitaxial external base region of  claim 13 , wherein the external base region is formed through an epitaxy growth process, the external base region is formed of Si, SiGe or carbon-doped SiGe, and the impurity is doped at a concentration of 1E19 to 1E21 cm −3 .