Layered decoding architecture with reduced number of hardware buffers for LDPC codes
Abstract
A layered decoding architecture with a reduced number of hardware buffers for low-density parity-check (LDPC) decoding by storing a variable-to-check message. When a check node begins a new operation, a variable-to-check message (Q) is added to a check-to-variable message (R) obtained in previous check-node operation to obtain an updated APP value. Then, the R value for the check node in the layer being processed is deducted from the APP value to obtain a variable-to-check message (Q). This variable-to-check message is stored in the memory and inserted into the check node equation to obtain a check-to-variable message. Finally the check-to-variable message obtained in this operation is stored to the check-to-variable message shift register to complete the updating operation for the check node and the variable node for the layer being processed. Improved hardware utilization and fewer buffers, thus achieving a smaller hardware area while retaining the converge speed, is obtained.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A layered decoding architecture for low density parity check (LDPC) decoding comprising:
a variable-to-check message magnitude memory configured to store obtained magnitudes of channel values as initial or later calculated variable-to-check message magnitudes;
an A Posteriori Probability (APP) calculation unit electrically coupled to the variable-to-check message magnitude memory and configured to sum a variable-to-check message (Q) and a check-to-variable message (R), APP=Q+R;
an APP sign routing network unit electrically connected to the APP calculation unit so as to route updated APP signs to each corresponding variable node;
an APP sign memory electrically connected to the APP sign routing network unit so as to retrieve routed and updated APP signs;
an APP routing network unit electrically connected to the APP calculation unit so as to route updated APP values to corresponding check nodes;
a variable-to-check message calculation unit electrically connected to the APP routing network unit;
a variable-to-check message sign memory electrically connected to the APP calculation unit and to the variable-to-check message calculation unit so as to provide corresponding stored variable-to-check message signs and store variable-to-check message signs obtained from the variable-to-check message calculation unit; and
a check-node processor electrically connected to the APP calculation unit and to the variable-to-check message calculation unit,
wherein the APP calculation unit updates the APP values for all related variable nodes j connected to the check nodes i in the check-node layer being processed after all these variable nodes j are updated according to the following APP equation:
APP j =Q f(i,j)j +R f(i,j)j , ∀jεN ( i )
where f (i, j) represents the check node which performs the final check-to-variable message delivery together with the variable node j prior to the check node i being processed, Q f(i,j)j and R f(i,j)j are, respectively, the variable-to-check message and the check-to-variable message corresponding to check node f (i, j) and variable node j.
2. The architecture of claim 1 , wherein the variable-to-check message is the combination of the variable-to-check message magnitude and the variable-to-check message sign and wherein the check-to-variable message is the combination of the check-to-variable message sign equal to a product of the total product of the variable-to-check message signs, the variable-to-check message signs, and the check-to-variable message magnitude which is calculated using a minimal variable-to-check message index and minimal and second minimal variable-to-check message magnitudes.
3. The architecture of claim 1 , wherein the variable-to-check message calculation unit retrieves the routed APP value, the variable-to-check message sign and a total product of the variable-to-check message signs, a minimal variable-to-check message magnitude index, and a minimal and second minimal variable-to-check message magnitudes and then calculates the variable-to-check message by subtracting the check-to-variable message from the routed APP value, Q=APP−R.
4. The architecture of claim 3 , wherein the check-to-variable message is a combination of the check-to-variable message sign, which is a product of the total product of the variable-to-check message sign and the variable-to-check message sign and the check-to-variable message magnitude which is calculated using the minimal variable-to-check message index and the minimal and the second minimal variable-to-check message magnitudes such that the variable-to-check message calculation unit calculates the variable-to-check message using both the routed APP value and the check-to-variable message.
5. The architecture of claim 1 , wherein the calculated variable-to-check message and sign and magnitude thereof as stored in the variable-to-check message sign memory and the variable-to-check message magnitude memory, respectively, are then combined and then simultaneously forwarded to the check node processor.
6. A layered decoding architecture for low density parity check (LDPC) decoding comprising:
a variable-to-check message magnitude memory configured to store obtained magnitudes of channel values as initial or later calculated variable-to-check message magnitudes;
an A Posteriori Probability (APP) calculation unit electrically coupled to the variable-to-check message magnitude memory and configured to sum a variable-to-check message (Q) and a check-to-variable message (R), APP=Q+R;
an APP sign routing network unit electrically connected to the APP calculation unit so as to route updated APP signs to each corresponding variable node;
an APP sign memory electrically connected to the APP sign routing network unit so as to retrieve routed and updated APP signs;
an APP routing network unit electrically connected to the APP calculation unit so as to route updated APP values to corresponding check nodes;
a variable-to-check message calculation unit electrically connected to the APP routing network unit;
a variable-to-check message sign memory electrically connected to the APP calculation unit and to the variable-to-check message calculation unit so as to provide corresponding stored variable-to-check message signs and store variable-to-check message signs obtained from the variable-to-check message calculation unit; and
a check-node processor electrically connected to the APP calculation unit and to the variable-to-check message calculation unit,
wherein the variable-to-check message calculation, unit produces the variable-to-check message Q ij for variable node j related to all the check nodes i in the check-node layer being processed using the following variable-to-check message equation,
Q ij =APP j −R ij , ∀jεN ( i )
where APP j represents the APP value updated in the previous operation for variable node j; and R ij represents the check-to-variable message from check node i to variable node j obtained in the previous decoding iteration.
7. A layered decoding architecture for low density parity check (LDPC) decoding comprising:
a variable-to-check message magnitude memory configured to store obtained magnitudes of channel values as initial or later calculated variable-to-check message magnitudes;
an A Posteriori Probability (APP) calculation unit electrically coupled to the variable-to-check message magnitude memory and configured to sum a variable-to-check message (Q) and a check-to-variable message (R), APP=Q+R;
an APP sign routing network unit electrically connected to the APP calculation unit so as to route updated APP signs to each corresponding variable node;
an APP sign memory electrically connected to the APP sign routing network unit so as to retrieve routed and updated APP signs;
an APP routing network unit electrically connected to the APP calculation unit so as to route updated APP values to corresponding check nodes;
a variable-to-check, message calculation unit electrically connected to the APP routing network unit;
a variable-to-check message sign memory electrically connected to the APP calculation unit and to the variable-to-check message calculation unit so as to provide corresponding stored variable-to-check message signs and store variable-to-check message signs obtained from the variable-to-check message calculation unit; and
a check-node processor electrically connected to the APP calculation unit and to the variable-to-check message calculation unit,
wherein the check node processor performs the check-to-variable message calculation according to the following check node equation related to all the check nodes i′ in the check-node layer being processed:
R i′j =α└Π kεN(i′)/{j} sign( Q i′k )┘min kεN(i′)/{j} {|Q i′k |}, ∀jεN ( i ′)
where α is the normalization factor, └Π kεN(i′)/{j} sign( Q i′k )┘is the product of the variable-to-check messages signs that are forwarded from the variable nodes connected to the check nodes i′, except for the variable node j, min kεN(i′)/{j} {|Q i′k |} is the minimal variable-to-check message magnitude held by one of the variable nodes in set N(i′) except for the variable node j; and thereby the check-to-variable message R i′j from check node i′ to variable node j is obtained.Cited by (0)
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