Directional coupler integrated by CMOS process

Abstract

A directional coupler is disclosed integrated on a single chip and an integrated circuit based on a standard CMOS process and relates to a field of radio frequency communication. In exemplary implementations, by using a standard CMOS process technology, the directional coupler integrated by a CMOS process is formed by a coil wound by a upper layer of metal lines, a coil wound by a lower layer of metal lines, two tuning capacitor array, and a matching resistor. Two terminals of the coil are a direct terminal and an input terminal; two terminals of the coil are a coupled terminal and an isolation terminal; the terminals of the coils and are intersected at 90°; the coil is wound by an upper metal layer and the coil is wound by a lower metal layer. Further, the insertion loss is low and the isolation degree is large.

What is claimed is: 
     
       1. A directional coupler based on a CMOS process, comprising:
 a first coil which is formed by a Mth metal layer and is connected between an input terminal and a direct terminal, and a first intersect portion of which is connected by (M−1) th metal layer; a second coil which is formed by an Nth metal layer and is connected between a coupled terminal and an isolated terminal, and a second intersect portion of which is connected by (N+1)th metal layer and the first coil and the second coil to form a three-dimensional structure; 
 wherein the first coil and the second coil are formed in a shape of a square, a circle, a rectangle, an octagon or other polygon; 
 wherein two ends of the first coil and two ends of the second coil form an angle of 90°, a distance between the direct terminal and the coupled terminal is small while a distance between the input terminal and the coupled terminal is large; 
 wherein metal lines of the first coil and the second coil are arranged to intersect vertically, a center of an upper layer metal line is vertically aligned with a center of an interval of a lower layer metal line, the upper and lower layer metal lines have an overlap, wherein a line width of the metal lines is larger than or equal to a vertical interval between the metal lines; 
 wherein a first adjustable capacitor array is disposed between the input terminal and the direct terminal to achieve a frequency tuning; and 
 wherein a second adjustable capacitor array is disposed between the coupled terminal and the isolated terminal to achieve an isolation degree tuning. 
 
     
     
       2. An integrated circuit used for a directional coupler tuning technology, wherein, the integrated circuit comprises the directional coupler according to  claim 1 , and
 the directional coupler changes a frequency of a lower concave point of an isolation degree curve by changing the first adjustable capacitor array, and changes a down concaved depth of the isolation degree curve by changing the second adjustable capacitor array. 
 
     
     
       3. The integrated circuit of  claim 2 , wherein, the integrated circuit is fabricated by a BiCMOS process. 
     
     
       4. The integrated circuit of  claim 3  wherein the directional coupler has performance parameters, including one or more of coupling degree, isolation degree and/or directivity, which are flexibly changeable as a function of selecting different coil shapes, quantity of coil windings, line widths of the metal lines, quantity of the metal layers and/or quantity of the metal lines overlapped between different metal layers. 
     
     
       5. The integrated circuit of  claim 3  wherein the CMOS process is based on a Si substrate. 
     
     
       6. The integrated circuit of  claim 5  wherein the directional coupler has performance parameters, including one or more of coupling degree, isolation degree and/or directivity, which are flexibly changeable as a function of selecting different coil shapes, quantity of coil windings, line widths of the metal lines, quantity of the metal layers and/or quantity of the metal lines overlapped between different metal layers. 
     
     
       7. The integrated circuit of  claim 2 , wherein the integrated circuit is fabricated by a BJT and/or HBT process. 
     
     
       8. The integrated circuit of  claim 2 , wherein the integrated circuit is integrated on a single chip. 
     
     
       9. The integrated circuit of  claim 8  wherein the directional coupler has performance parameters, including one or more of coupling degree, isolation degree and/or directivity, which are flexibly changeable as a function of selecting different coil shapes, quantity of coil windings, line widths of the metal lines, quantity of the metal layers and/or quantity of the metal lines overlapped between different metal layers. 
     
     
       10. The integrated circuit of  claim 2 , wherein the integrated circuit is a radio frequency identification reader. 
     
     
       11. The directional coupler of  claim 1 , wherein the directional coupler has performance parameters, including one or more of coupling degree, isolation degree and/or directivity, which are flexibly changeable as a function of selecting different coil shapes, quantity of coil windings, line widths of the metal lines, quantity of the metal layers and/or quantity of the metal lines overlapped between different metal layers. 
     
     
       12. The directional coupler of  claim 1 , wherein the first adjustable capacitor array prevents deterioration due to one or more non-ideal effects regarding output of the directional coupler including at least one of poor matching between outputs of transmitters associated with the directional coupler, varied output matching under different output powers, process fluctuation, and/or temperature variation. 
     
     
       13. The directional coupler of  claim 1 , wherein one or more of insertion loss, coupling degree, isolation degree, and/or directivity associated with the directional coupler is adjustable by changing one or more metal lines at different layers or by changing the vertical interval between the upper and the lower metal lines. 
     
     
       14. The directional coupler of  claim 13 , wherein the directional coupler has performance parameters, including one or more of coupling degree, isolation degree and/or directivity, which are flexibly changeable as a function of selecting different coil shapes, quantity of coil windings, line widths of the metal lines, quantity of the metal layers and/or quantity of the metal lines overlapped between different metal layers. 
     
     
       15. The directional coupler of  claim 1 , wherein the directional coupler is fabricated by a BiCMOS process. 
     
     
       16. The directional coupler of  claim 1 , wherein the directional coupler is integrated into a single chip via a silicon-based CMOS or BiCMOS process. 
     
     
       17. The directional coupler of  claim 16 , wherein the directional coupler has performance parameters, including one or more of coupling degree, isolation degree and/or directivity, which are flexibly changeable as a function of selecting different coil shapes, quantity of coil windings, line widths of the metal lines, quantity of the metal layers and/or quantity of the metal lines overlapped between different metal layers. 
     
     
       18. The directional coupler of  claim 16 , wherein one or more of insertion loss, coupling degree, isolation degree, and/or directivity associated with the directional coupler is adjustable by changing one or more metal lines at different layers or by changing the vertical interval between the upper metal and the lower metal lines. 
     
     
       19. The directional coupler of  claim 16 , wherein the first adjustable capacitor array prevents deterioration due to one or more non-ideal effects regarding output of the directional coupler including at least one of poor matching between outputs of transmitters associated with the directional coupler, varied output matching under different output powers, process fluctuation, and/or temperature variation. 
     
     
       20. The directional coupler of  claim 1 , wherein the directional coupler is fabricated by at least one of a BJT and/or HBT process.