US9275863B2ExpiredUtilityA1

Method of fabricating semiconductor device

62
Assignee: RENESAS ELECTRONICS CORPPriority: Aug 28, 1997Filed: Sep 22, 2014Granted: Mar 1, 2016
Est. expiryAug 28, 2017(expired)· nominal 20-yr term from priority
H10D 64/01344H10D 64/01346H10D 64/01342H10D 64/01324H10D 64/0134H10D 64/681H10D 64/519H10D 64/518H10D 64/513H10D 62/155H10D 62/127H10D 64/693H10D 64/685H10D 30/0297H10D 30/63H10D 30/025H10D 30/668H01L 29/0696H01L 29/7827H01L 29/513H01L 29/7813H01L 29/0869H01L 29/4236H01L 21/28194H01L 29/518H01L 21/28114H01L 29/42376H01L 29/66734H01L 21/28185H01L 29/4238H01L 29/66666H01L 21/28202H01L 21/28211H01L 29/511
62
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References
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Claims

Abstract

In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of manufacturing a semiconductor device including a MISFET, comprising steps of:
 (a) forming a first trench in a semiconductor substrate, the first trench including a first portion and a second portion arranged near a top surface of the semiconductor substrate rather than the first portion such that the second portion has a sloping shape rather than first portion; 
 (b) forming a gate insulating film of the MISFET over the semiconductor substrate including the first trench; 
 (c) forming a gate electrode of the MISFET over the gate insulating film in order to be embedded in the first trench; 
 (d) after the step (c), recessing the gate electrode such that an upper surface of the gate electrode is arranged at a position lower than the second portion; 
 (e) after the step (d), recessing the gate insulating film such that an upper surface of the gate insulating film is arranged at a position lower than the second portion; and 
 (f) after the step (e), forming a first insulating film over the gate electrode, the gate insulating film, the second portion and the top surface of the semiconductor substrate. 
 
     
     
       2. The method of manufacturing a semiconductor device according to the  claim 1 ,
 wherein, after the step (e), the gate electrode and the gate insulating film are not formed on the second portion. 
 
     
     
       3. The method of manufacturing a semiconductor device according to the  claim 1 ,
 wherein the gate insulating film includes a first gate insulating film formed on the first trench and a second gate insulating film formed between the first gate insulating film and the gate electrode, 
 wherein the first gate insulating film is formed by a thermal oxidation method, and 
 wherein the second gate insulating film is formed by a CVD method.

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