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US9478488B2ExpiredUtilityPatentIndex 52

Reducing loadline impedance in a system

Assignee: INTEL CORPPriority: Jul 16, 2004Filed: Jan 14, 2014Granted: Oct 25, 2016
Est. expiryJul 16, 2024(expired)· nominal 20-yr term from priority
Inventors:SEARLS DAMION TOSBURN EDWARD P
H05K 2201/10545H05K 2201/10515Y10T29/4913H05K 1/0262H05K 1/181H05K 2201/10704Y10T29/49147H05K 2201/1006H05K 2201/10166H05K 1/023H05K 2201/10325H05K 1/0231H10W 90/734H10W 90/724H10W 74/15H10W 72/877H10W 70/658H01L 2224/73204H01L 2924/00H01L 2924/13091H01L 2224/73253H01L 2224/32225H01L 2924/00012H01L 2924/19106H01L 23/49844H01L 2224/16225H01L 2924/1531
52
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Claims

Abstract

In one embodiment, the present invention includes a semiconductor device mounted to a first side of a circuit board; and at least one voltage regulator device mounted to a second side of the circuit board, the second side opposite to the first side. Examples of the voltage regulator devices include output filters, inductors, capacitors, and the like. In certain embodiments, the devices may be located directly underneath the semiconductor device.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising:
 a package wherein the package is coupled via a socket to a primary side of a circuit board, the circuit board having a plurality of voltage regulator components on a secondary side of the circuit board; and 
 a plurality of interconnects forming an interconnect field coupled to the package, the plurality of interconnects comprising:
 a first set of interconnects located at an interior portion of the interconnect field to connect to a first voltage; 
 a second set of interconnects located substantially around the first set of interconnects to connect to a second voltage; and 
 
 inductor pads to enable at least one inductor to be coupled to the secondary side of the circuit board and between a pulse width modulation plane and a supply plane of the circuit board. 
 
     
     
       2. The semiconductor device of  claim 1 , wherein the first set of interconnects and the second set of interconnects abut with a substantially crenellated pattern. 
     
     
       3. The semiconductor device of  claim 1 , wherein the first voltage comprises a power supply voltage and the second voltage comprises a reference voltage. 
     
     
       4. The semiconductor device of  claim 1 , wherein the plurality of voltage regulator components comprise output filters located substantially underneath the socket.

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