US9543150B2ActiveUtilityA1
Systems and methods for forming ultra-shallow junctions
Est. expiryJun 10, 2035(~8.9 yrs left)· nominal 20-yr term from priority
H10P 32/1204H10P 30/225H10P 70/00H10D 62/118H01L 21/02041H01L 21/2658H01L 21/324H01L 21/2256H01L 21/3003H10D 30/0241H10P 32/30H10P 32/20H10P 14/3461H10P 14/3438
61
PatentIndex Score
1
Cited by
14
References
27
Claims
Abstract
A method for forming a junction on a substrate includes removing a native oxide layer of a bulk material; doping an outer layer of the bulk material with molecular hydrogen to create a hydrogen-doped outer layer; and nano-doping the hydrogen-doped outer layer using one of boron or phosphorous to a target junction depth to create a nano-doped layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method for forming a junction on a substrate, comprising:
removing a native oxide layer of a bulk material;
doping an outer layer of the bulk material with molecular hydrogen to create a hydrogen-doped outer layer; and
nano-doping the hydrogen-doped outer layer using one of boron or phosphorous to a target junction depth to create a nano-doped layer.
2. The method of claim 1 , further comprising one of:
oxidizing the nano-doped layer; or
nitridating the nano-doped layer.
3. The method of claim 2 , wherein oxidizing the nano-doped layer includes using a gas mixture including silane, nitrous oxide and molecular nitrogen.
4. The method of claim 2 , wherein nitridating the nano-doped layer includes using a gas mixture including silane, ammonia and molecular nitrogen.
5. The method of claim 2 , further comprising annealing the substrate.
6. The method of claim 5 , further comprising removing at least part of the nano-doped layer.
7. The method of claim 6 , wherein removing the at least part of the nano-doped layer includes etching using wet etching or dry etching.
8. The method of claim 5 , wherein the annealing includes one of laser annealing, rapid thermal processing (RTP) or flash annealing.
9. The method of claim 1 , wherein removing the native oxide layer comprises exposing the substrate to plasma that includes molecular hydrogen as a plasma gas.
10. The method of claim 1 , wherein doping the outer layer with molecular hydrogen includes exposing the substrate to at least one of plasma, atomic layer deposition or a spin on dielectric.
11. The method of claim 1 , wherein the bulk material includes one of silicon, germanium (Ge) or SiGe.
12. The method of claim 1 , wherein the nano-doping includes exposing the substrate to at least one of plasma, atomic layer deposition and a spin on dielectric.
13. The method of claim 1 , wherein removing the native oxide layer comprises exposing the substrate to plasma that includes ammonia and argon as a plasma gas.
14. The method of claim 13 , further comprising, after removing the native oxide layer of the bulk material and prior to doping the outer layer of the bulk material with molecular hydrogen, removing fluorine residue.
15. The method of claim 14 , wherein removing the fluorine residue includes exposing the substrate to plasma including molecular hydrogen as a plasma gas.
16. The method of claim 1 , wherein the junction is formed on at least one of a fin field effect transistor (FINFET), a gate all around (GAA) transistor, and a buried bit line (BBL) and wherein the junction has a thickness of 8 to 12 nm.
17. The method of claim 1 , wherein the removing, doping and nano-doping are performed in an inductively coupled plasma (ICP) substrate processing system.
18. A method for forming a junction on a substrate, comprising:
removing a native oxide layer of a bulk material of the substrate;
eliminating fluorine residue on a surface of the bulk material;
doping an outer layer of the bulk material with molecular hydrogen to create a hydrogen-doped outer layer;
oxidizing the hydrogen-doped outer layer to create an oxidized outer layer;
removing at least part of the oxidized outer layer; and
nano-doping using one of phosphorous or arsenic to a target junction depth to create a doped layer.
19. The method of claim 18 , wherein the oxidizing includes oxidizing the hydrogen-doped outer layer using a gas mixture including silane, nitrous oxide and molecular nitrogen.
20. The method of claim 18 , further comprising annealing the substrate.
21. The method of claim 20 , wherein the annealing includes one of laser annealing, rapid thermal processing (RTP) or flash annealing.
22. The method of claim 18 , wherein removing the oxidized outer layer includes etching using plasma with ammonia and argon as plasma gases.
23. The method of claim 18 , wherein doping the outer layer with molecular hydrogen includes exposing the substrate to at least one of plasma, atomic layer deposition or a spin on dielectric.
24. The method of claim 18 , wherein the bulk material includes silicon.
25. The method of claim 18 , wherein the nano-doping includes exposing the substrate to at least one of plasma, atomic layer deposition and a spin on dielectric.
26. The method of claim 18 , wherein the junction is formed on at least one of a fin field effect transistor (FINFET), a gate all around (GAA) transistor, and a buried bit line (BBL) and wherein the junction has a thickness of 8 to 12 nm.
27. The method of claim 18 , wherein the removing, doping and nano-doping are performed in an inductively coupled plasma (ICP) substrate processing system.Cited by (0)
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