Mitigation of EMI/ESD-caused transmission errors on an electronic circuit
Abstract
A method detects and mitigates harm caused by electromagnetic interference (EMI) to digital transmissions within an electronic circuit. One or more processors check for an initial transmission error during an initial digital transmission between a digital transmitter and a digital receiver on an electronic circuit. In response to detecting the initial transmission error, the processor(s) receive electromagnetic interference (EMI) detection signals from one or more EMI detectors. In response to determining that the EMI detection signals represent an EMI level that exceeds a predetermined value, the processor(s) identify an EMI anomaly source on the electronic circuit and adjusts the EMI anomaly source until the EMI level has been reduced to a nominal level. A copy of the initial digital transmission is then resent from the digital transmitter to the digital receiver. If no transmission error reoccurs, then the EMI anomaly source is kept in the adjusted state.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method of detecting and mitigating harm caused by electromagnetic interference (EMI) to digital transmissions within an electronic circuit, the method comprising:
storing, by a transmission buffer, a copy of a digital transmission;
transmitting an original version of the digital transmission from a digital transmitter to a digital receiver on an electronic circuit;
checking, by one or more processors, a transmission fault register for an initial transmission error between the digital transmitter and the digital receiver on the electronic circuit;
in response to detecting the initial transmission error, receiving, by one or more processors, electromagnetic interference (EMI) detection signals from one or more EMI detectors, wherein the EMI detection signals represent an anomalous EMI event;
in response to determining that the EMI detection signals represent an EMI level that exceeds a predetermined value, identifying, by one or more processors, an EMI anomaly source on the electronic circuit;
selectively adjusting, by one or more processors, the EMI anomaly source until the EMI level drops below the predetermined value while the EMI anomaly source is in an adjusted state;
in response to determining that the EMI level has dropped below the predetermined value, retrieving, by one or more processors, the copy of the digital transmission from the transmission buffer;
transmitting, from the digital transmitter to the digital receiver on the electronic circuit, the retrieved copy of the digital transmission from the transmission buffer;
rechecking, by one or more processors, the transmission fault register for a subsequent transmission error between the digital transmitter and the digital receiver on the electronic circuit, wherein the subsequent transmission error occurs while transmitting, from the digital transmitter to the digital receiver on the electronic circuit, the retrieved copy of the digital transmission from the transmission buffer; and
in response to detecting no subsequent transmission error, maintaining, by one or more processors, the EMI anomaly source at the adjusted state.
2. The method of claim 1 , wherein the adjusted state is a throttled back state of the EMI anomaly source.
3. The method of claim 1 , wherein the adjusted state is an isolation of the EMI anomaly source from the electronic circuit.
4. The method of claim 1 , wherein the digital transmission being transmitted from the digital transmitter to the digital receiver is processor-executable instructions.
5. The method of claim 1 , wherein the digital transmission being transmitted from the digital transmitter to the digital receiver is data.
6. The method of claim 1 , wherein the one or more EMI detectors are part of the electronic circuit.
7. The method of claim 1 , further comprising:
identifying, by one or more processors, the location of the EMI anomaly source by evaluating a strength and direction of EMI signals being received by the one or more EMI detectors.
8. The method of claim 1 , further comprising:
in response to detecting the initial transmission error, receiving, by one or more processors, an electrostatic discharge (ESD) detection signal from an ESD detector; and
in response to determining that the ESD detection signal represents an ESD level that exceeds a predetermined value, identifying, by one or more processors, a location of an ESD anomaly source on the electronic circuit.
9. The method of claim 8 , further comprising:
identifying, by one or more processors, the location of the ESD anomaly source by evaluating a strength and direction of ESD signals being received by the ESD detector.
10. The method of claim 1 , further comprising:
in response to detecting the initial transmission error, receiving, by one or more processors, electrostatic discharge (ESD) detection signals from multiple ESD detectors;
in response to determining that the ESD detection signals represent an ESD level that exceeds a predetermined value, identifying, by one or more processors, a location of an ESD anomaly source on the electronic circuit based on strengths and directions of ESD signals being received by the multiple ESD detectors.
11. The method of claim 1 , further comprising:
in response to determining that the EMI detection signals represent an EMI level that exceeds a predetermined value, identifying, by one or more processors, a location of multiple EMI anomaly sources on the electronic circuit; and
selectively adjusting, by one or more processors, the multiple EMI anomaly sources until the EMI level drops below the predetermined value.
12. A computer program product for detecting and mitigating harm caused by electromagnetic interference (EMI) to digital transmissions within an electronic circuit, the computer program product comprising a non-transitory computer readable storage medium having program code embodied therewith, the program code readable and executable by a processor to perform a method comprising:
storing, by a transmission buffer, a copy of a digital transmission;
transmitting an original version of the digital transmission from a digital transmitter to a digital receiver on an electronic circuit;
checking a transmission fault register for an initial transmission error between the digital transmitter and the digital receiver on the electronic circuit;
in response to detecting the initial transmission error, receiving electromagnetic interference (EMI) detection signals from one or more EMI detectors, wherein the EMI detection signals represent an anomalous EMI event;
in response to determining that the EMI detection signals represent an EMI level that exceeds a predetermined value, identifying an EMI anomaly source on the electronic circuit;
selectively adjusting the EMI anomaly source until the EMI level drops below the predetermined value while the EMI anomaly source is in an adjusted state;
in response to determining that the EMI level has dropped below the predetermined value, retrieving the copy of the digital transmission from the transmission buffer;
transmitting, from the digital transmitter to the digital receiver on the electronic circuit, the retrieved copy of the digital transmission from the transmission buffer;
rechecking the transmission fault register for a subsequent transmission error between the digital transmitter and the digital receiver on the electronic circuit, wherein the subsequent transmission error occurs while transmitting, from the digital transmitter to the digital receiver on the electronic circuit, the retrieved copy of the digital transmission from the transmission buffer; and
in response to detecting no subsequent transmission error, maintaining the EMI anomaly source at the adjusted state.
13. The computer program product of claim 12 , wherein the adjusted state is a throttled back state of the EMI anomaly source.
14. The computer program product of claim 12 , wherein the adjusted state is an isolation of the EMI anomaly source from the electronic circuit.
15. The computer program product of claim 12 , wherein the one or more EMI detectors are part of the electronic circuit.
16. The computer program product of claim 12 , wherein the method further comprises:
identifying the location of the EMI anomaly source by evaluating a strength and direction of EMI signals being received by the one or more EMI detectors.
17. The computer program product of claim 12 , wherein the method further comprises:
in response to detecting the initial transmission error, receiving electrostatic discharge (ESD) detection signals from an ESD detector; and
in response to determining that the ESD detection signals represent an ESD level that exceeds a predetermined value, identifying the location of the ESD anomaly source by evaluating a strength and direction of ESD signals being received by the ESD detector.
18. The computer program product of claim 12 , wherein the method further comprises:
in response to detecting the initial transmission error, receiving electrostatic discharge (ESD) detection signals from multiple ESD detectors;
in response to determining that the ESD detection signals represent an ESD level that exceeds a predetermined value, identifying a location of an ESD anomaly source on the electronic circuit based on strengths and directions of ESD signals being received by the multiple ESD detectors.
19. The computer program product of claim 12 , wherein the method further comprises:
in response to determining that the EMI detection signals represent an EMI level that exceeds a predetermined value, identifying a location of multiple EMI anomaly sources on the electronic circuit; and
selectively adjusting the multiple EMI anomaly sources until the EMI level drops below the predetermined value.
20. A computer circuit comprising:
a digital transmitter;
a digital receiver;
a transmission bus electronically coupling the digital transmitter to the digital receiver;
a transmission buffer for storing a copy of digital transmissions;
an error detector for detecting errors in the digital transmissions on the transmission bus;
a transmission fault register for storing a record of transmission errors detected by the error detector;
an array of electromagnetic interference (EMI)/electrostatic discharge (ESD) detectors;
an EMI/ESD monitoring logic for monitoring EMI/ESD signals from the EMI/ESD detectors;
an EMI/ESD source, wherein the EMI/ESD source generates an anomalous EMI/ESD signal that is detected by the EMI/ESD monitoring logic, wherein the anomalous EMI/ESD signal exceeds a predefined EMI/ESD level;
an EMI/ESD source amelioration device, wherein the EMI/ESD source amelioration device adjusts the EMI/ESD source to an adjusted state in order to bring the anomalous EMI/ESD signal below the predefined EMI/ESD level;
a digital transmission replay logic, wherein the digital transmission replay logic retransmits the copy of the digital transmissions stored in the transmission buffer from the digital transmitter to the digital receiver after the anomalous EMI/ESD signal is below the predefined EMI/ESD level; and
a circuit control logic, wherein the circuit control logic:
determines that no transmission error occurs while the digital transmission replay logic retransmits the copy of the data transmissions stored in the transmission buffer from the digital transmitter to the digital receiver after the anomalous EMI/ESD signal is below the predefined EMI/ESD level; and
in response to determining that no transmission error occurred while the digital transmission replay logic retransmitted the copy of the digital transmissions stored in the transmission buffer from the digital transmitter to the digital receiver after the anomalous EMI/ESD signal was below the predefined EMI/ESD level, directs the EMI/ESD source amelioration device to keep the EMI/ESD source at the adjusted state in order to keep the anomalous EMI/ESD signal below the predefined EMI/ESD level.Cited by (0)
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