Inventor · disambiguated record
Anuwat Saetow
Also filed as: SAETOW ANUWAT
37 granted patents·3 pending applications·52 citations·filing 2011–2021
95Inventor score
Top patents by PatentIndex Score
40 records- 0191US8692561B2Implementing chip to chip calibration within a TSV stackCORDERO EDGAR R·Filed 2011·Granted Apr 8, 2014·15 cites·20 claims
- 0284US10168922B1Volatile and non-volatile memory in a TSV moduleIBM·Filed 2016·Granted Jan 1, 2019·4 cites·17 claims
- 0384US9548773B1Mitigation of EMI/ESD-caused transmission errors on an electronic circuitIBM·Filed 2016·Granted Jan 17, 2017·5 cites·20 claims
- 0483US8996953B2Self monitoring and self repairing ECCIBM·Filed 2013·Granted Mar 31, 2015·6 cites·20 claims
- 0580US9230687B2Implementing ECC redundancy using reconfigurable logic blocksIBM·Filed 2013·Granted Jan 5, 2016·7 cites·18 claims
- 0674US9753076B2Voltage rail monitoring to detect electromigrationIBM·Filed 2016·Granted Sep 5, 2017·1 cites·20 claims
- 0770US9251054B2Implementing enhanced reliability of systems utilizing dual port DRAMIBM·Filed 2014·Granted Feb 2, 2016·2 cites·13 claims
- 0868US8930776B2Implementing DRAM command timing adjustments to alleviate DRAM failuresCORDERO EDGAR R·Filed 2012·Granted Jan 6, 2015·2 cites·18 claims
- 0967US9965346B2Handling repaired memory array elements in a memory of a computer systemIBM·Filed 2016·Granted May 8, 2018·1 cites·18 claims
- 1066US9063902B2Implementing enhanced hardware assisted DRAM repair using a data register for DRAM repair selectively provided in a DRAM moduleCORDERO EDGAR R·Filed 2012·Granted Jun 23, 2015·2 cites·16 claims
- 1165US9753806B1Implementing signal integrity fail recovery and mainline calibration for DRAMIBM·Filed 2016·Granted Sep 5, 2017·2 cites·20 claims
- 1264US9224450B2Reference voltage modification in a memory deviceIBM·Filed 2013·Granted Dec 29, 2015·2 cites·11 claims
- 1362US2018074109A1Voltage Rail Monitoring to Detect ElectromigrationIBM·Filed 2017·Application pending·0 cites
- 1459US11669381B1Real-time error debuggingIBM·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 1559US10592332B2Auto-disabling DRAM error checking on thresholdIBM·Filed 2018·Granted Mar 17, 2020·0 cites·20 claims
- 1659US9857416B2Voltage rail monitoring to detect electromigrationIBM·Filed 2016·Granted Jan 2, 2018·0 cites·10 claims
- 1759US9535784B2Self monitoring and self repairing ECCIBM·Filed 2015·Granted Jan 3, 2017·1 cites·20 claims
- 1857US9349432B2Reference voltage modification in a memory deviceIBM·Filed 2015·Granted May 24, 2016·1 cites·18 claims
- 1956US10936222B2Hardware abstraction in software or firmware for hardware calibrationIBM·Filed 2019·Granted Mar 2, 2021·0 cites·20 claims
- 2055US9348744B2Implementing enhanced reliability of systems utilizing dual port DRAMIBM·Filed 2014·Granted May 24, 2016·0 cites·7 claims
- 2155US9305619B2Implementing simultaneous read and write operations utilizing dual port DRAMIBM·Filed 2014·Granted Apr 5, 2016·1 cites·5 claims
- 2254US10949295B2Implementing dynamic SEU detection and correction method and circuitIBM·Filed 2018·Granted Mar 16, 2021·0 cites·20 claims
- 2354US9996414B2Auto-disabling DRAM error checking on thresholdIBM·Filed 2016·Granted Jun 12, 2018·0 cites·20 claims
- 2453US10897239B1Granular variable impedance tuningIBM·Filed 2019·Granted Jan 19, 2021·0 cites·20 claims
- 2551US10983832B2Managing heterogeneous memory resource within a computing systemIBM·Filed 2019·Granted Apr 20, 2021·0 cites·20 claims
- 2650US10324879B2Mitigation of side effects of simultaneous switching of input/output (I/O data signalsIBM·Filed 2016·Granted Jun 18, 2019·0 cites·19 claims
- 2748US10157672B2SRAM bitline equalization using phase change materialIBM·Filed 2017·Granted Dec 18, 2018·0 cites·5 claims
- 2846US10229738B2SRAM bitline equalization using phase change materialIBM·Filed 2017·Granted Mar 12, 2019·0 cites·7 claims
- 2945US10896081B2Implementing SEU detection method and circuitIBM·Filed 2018·Granted Jan 19, 2021·0 cites·20 claims
- 3044US10168923B2Coherency management for volatile and non-volatile memory in a through-silicon via (TSV) moduleIBM·Filed 2016·Granted Jan 1, 2019·0 cites·11 claims
- 3144US9305618B2Implementing simultaneous read and write operations utilizing dual port DRAMIBM·Filed 2014·Granted Apr 5, 2016·0 cites·10 claims
- 3244US9245604B2Prioritizing refreshes in a memory deviceIBM·Filed 2013·Granted Jan 26, 2016·0 cites·15 claims
- 3343US10268615B2Determining timeout values for computing systemsIBM·Filed 2017·Granted Apr 23, 2019·0 cites·20 claims
- 3443US9418722B2Prioritizing refreshes in a memory deviceIBM·Filed 2015·Granted Aug 16, 2016·0 cites·11 claims
- 3542US10585672B2Memory device command-address-control calibrationIBM·Filed 2016·Granted Mar 10, 2020·0 cites·14 claims
- 3642US2013262792A1Memory device support of dynamically changing frequency in memory systemsBARTH JR JOHN E·Filed 2012·Application pending·0 cites
- 3740US2013262791A1Host-side support of dynamically changing frequency in memory systemsHENDERSON JOAB D·Filed 2012·Application pending·0 cites
- 3838US10096353B2System and memory controller for interruptible memory refreshIBM·Filed 2013·Granted Oct 9, 2018·0 cites·17 claims
- 3938US9972376B2Memory device for interruptible memory refreshIBM·Filed 2013·Granted May 15, 2018·0 cites·10 claims
- 4029US10127100B2Correcting a data storage error caused by a broken conductor using bit inversionIBM·Filed 2016·Granted Nov 13, 2018·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →