Method of forming semiconductor device

Abstract

The present invention provides a method of forming a semiconductor device including following steps. Firstly, a fin shaped structure is formed on a substrate, and a gate structure is formed to be across the fin shaped structure. Next, a dielectric layer is formed on the substrate, covering the gate structure, and a gate electrode of the gate structure is removed, to form a first gate trench. Then, a threshold voltage implantation process and a compensated threshold voltage implantation process are sequentially performed in the first gate trench, to implant compensated two dopants respectively. Following these, a work function layer and a conductive layer are formed to fill the first gate trench.

What is claimed is: 
     
       1. A method of forming a semiconductor device, comprising:
 forming a fin shaped structure on a substrate; 
 forming a plurality of gate structures across the fin shaped structure; 
 forming a dielectric layer on the substrate, covering the gate structures; 
 removing gate electrodes of the gate structures, to form a first gate trench, a second gate trench, a third gate trench and a fourth gate trench; 
 performing a first threshold voltage implantation process in the first gate trench, to implant a first dopant in a first conductive type; 
 performing a compensated threshold voltage implantation process in the first gate trench, to implant a second dopant in a second conductive type, wherein the second conductive type is opposite to the first conductive type; 
 forming a first work function layer in the fourth gate trench; 
 forming a second work function layer in the first gate trench, the second gate trench and the third gate trench, and on the first work function layer in the fourth gate trench, wherein the first work function layer and the second work function layer have a same conductive type; 
 forming a fifth gate trench while removing the gate electrodes of the gate structures; 
 forming the first work function layer in the fifth gate trench; and 
 performing a second threshold voltage implantation process in the fifth gate trench, to implant a third dopant in the first conductive type. 
 
     
     
       2. The method of forming a semiconductor device according to  claim 1 , wherein the first dopant comprises IIIA elements. 
     
     
       3. The method of forming a semiconductor device according to  claim 2 , wherein the second dopant comprises VA elements. 
     
     
       4. The method of forming a semiconductor device according to  claim 1 , wherein the first dopant comprises VA elements. 
     
     
       5. The method of forming a semiconductor device according to  claim 4 , wherein the second dopant comprises IIIA elements. 
     
     
       6. The method of forming a semiconductor device according to  claim 1 , wherein the first dopant comprises BF 2  and the second dopant comprises P. 
     
     
       7. The method of forming a semiconductor device according to  claim 1 , wherein the first dopant comprises BF 2  and the second dopant comprises As. 
     
     
       8. The method of forming a semiconductor device according to  claim 1 , wherein the first threshold voltage implantation process is performed before gate dielectric layers of the gate structures are formed. 
     
     
       9. The method of forming a semiconductor device according to  claim 1 , wherein the first threshold voltage implantation process is performed after gate dielectric layers of the gate structures are formed. 
     
     
       10. The method of forming a semiconductor device according to  claim 1 , wherein while performing the first threshold voltage implantation process, the first dopant is also implanted in the third gate trench. 
     
     
       11. The method of forming a semiconductor device according to  claim 1 , further comprising:
 forming a shallow trench isolation surrounded the fin shaped structure. 
 
     
     
       12. The method of forming a semiconductor device according to  claim 1 , further comprising:
 forming a barrier layer in the first gate trench, the second gate trench, the third gate trench and the fourth gate trench; and 
 forming a conductive layer filled in the first gate trench, the second gate trench, the third gate trench and the fourth gate trench.