Semiconductor device

Abstract

In an IGBT portion, a first gate electrode is provided in a first trench via a first gate insulating film. A thickness of a first gate insulating film lower portion is thicker than a thickness of a first gate insulating film upper portion, whereby a width of a mesa portion between adjacent first trenches is narrower at a portion of a collector side than at an emitter side. In a diode portion, a second gate electrode is provided inside a second trench via second gate insulating film. A width of the second trench is uniform along a depth direction or narrows from the emitter side toward the collector side. Widths of the second trench are narrower than a sum of a width of the first trench lower portion and the thickness of the first gate insulating film lower portion of both side walls of the first trench lower portion.

What is claimed is: 
     
       1. A semiconductor device having a first element portion that is an operating region of an insulated gate bipolar transistor and a second element portion that is an operating region of a diode disposed in parallel on a single semiconductor substrate, wherein
 the first element portion comprises:
 a semiconductor layer of a first conductivity type formed by the semiconductor substrate of the first conductivity type, 
 a first semiconductor region of a second conductivity type and provided in a first principal surface side of the semiconductor layer, 
 a second semiconductor region of the first conductivity type and provided selectively inside the first semiconductor region, 
 a first trench configured to reach the semiconductor layer, through the second semiconductor region and the first semiconductor region, 
 a first gate electrode provided inside the first trench, via a first gate insulating film, and 
 a third semiconductor region of the second conductivity type and provided in a second principal surface side of the semiconductor layer, 
 
 the second element portion comprises:
 the first semiconductor region, 
 a second trench configured to reach the semiconductor layer, through the first semiconductor region, 
 a second gate electrode provided inside the second trench, via a second gate insulating film, and 
 a fourth semiconductor region of the first conductivity type and provided in the second principal surface side of the semiconductor layer, 
 
 the semiconductor device further comprising:
 a first electrode configured to contact the first semiconductor region and the second semiconductor region; and 
 a second electrode configured to contact the third semiconductor region and the fourth semiconductor region, wherein 
 
 a width of the second trench is any one among uniform along a depth direction, and narrowing from a first electrode side toward a second electrode side. 
 
     
     
       2. The semiconductor device according to  claim 1 , wherein
 a depth of the second trench is shallower than a depth of the first trench. 
 
     
     
       3. The semiconductor device according to  claim 1 , wherein
 a portion of the second electrode side is narrower than a portion of the first electrode side in a portion between the first trench and an adjacent first trench. 
 
     
     
       4. The semiconductor device according to  claim 3 , wherein
 a thickness of the first gate insulating film is formed to be thicker at the portion of the second electrode side than at the portion of the first electrode side, and 
 the portion between the first trench and the adjacent first trench is narrower at the portion of the second electrode side than at the portion of the first electrode side. 
 
     
     
       5. The semiconductor device according to  claim 4 , wherein
 a boundary surface of a portion of a second electrode side of the first gate insulating film and the first gate electrode is positioned farther inward in the first trench than a boundary surface of a portion of a first electrode side of the first gate insulating film and the first gate electrode. 
 
     
     
       6. The semiconductor device according to  claim 1 , wherein
 a width of the first trench is narrower at a trench lower portion of the second electrode side than at a trench upper portion of the first electrode side, and 
 a border of the trench upper portion and the trench lower portion is positioned more on the first electrode side than a border of the first semiconductor region and the semiconductor layer. 
 
     
     
       7. The semiconductor device according to  claim 6 , wherein
 a width of the trench upper portion is narrower than a sum of a width of the trench lower portion and a thickness of the first gate insulating film of both side walls of the trench lower portion.