Thread processing method and thread processing system for setting for each thread priority level of access right to access shared memory

Abstract

A thread processing method is executed by a specific apparatus included among a plurality of apparatuses, and includes assigning one thread among a plurality of threads to the apparatuses, respectively; acquiring first time information that indicates a time at which the specific apparatus receives an execution result of a corresponding thread from each of the apparatuses; and setting a priority level of an access right to access shared memory that is shared by the apparatuses and the specific apparatus, the setting being based on the first time information and second time information that indicates a time at which reception of execution results of the threads from the apparatuses ends.

What is claimed is: 
     
       1. A thread processing method executed by a specific apparatus, the method comprising:
 assigning a plurality of threads to a plurality of apparatuses, wherein the plurality of threads are controlled to be synchronized with each other by the plurality of apparatuses and each of the plurality of threads executes processing to access a shared memory shared by the specific apparatus and the plurality of apparatuses; 
 acquiring, for each of the plurality of apparatuses, first time information that indicates a time at which the specific apparatus receives an execution result of a thread assigned to the apparatus; 
 calculating, for each of the plurality of apparatuses, a synchronization standby period during which the apparatus is in a synchronization-standby mode and that is a difference between the time indicated by the first time information and a time that is indicated by second time information and at which the specific apparatus receives a last execution result among execution results of threads that are assigned to the plurality of apparatuses; and 
 setting, in an ascending order of the synchronization standby period, a priority level of an access right for each of the plurality of apparatuses to access the shared memory when executing a new thread that executes the processing to access the shared memory. 
 
     
     
       2. The thread processing method according to  claim 1 , further comprising
 notifying the plurality of apparatuses of information concerning the priority level of the access right to access the shared memory. 
 
     
     
       3. The thread processing method according to  claim 1 , wherein
 the setting includes setting the priority level of the access right to access the shared memory such that a shorter synchronization standby period corresponds to a higher priority level. 
 
     
     
       4. A thread processing system, comprising:
 a specific apparatus and a plurality of other apparatuses, wherein 
 the specific apparatus is configured to: 
 assign a plurality of threads to the other apparatuses, wherein the plurality of threads are controlled to be synchronized with each other by the plurality of other apparatuses and each of the plurality of threads executes processing to access a shared memory shared by the specific apparatus and the plurality of other apparatuses; 
 acquire, for each of the plurality of other apparatuses, first time information that indicates a time at which the specific apparatus receives an execution result of a thread assigned to the respective other apparatus; 
 calculate, for each of the plurality of apparatuses, a synchronization standby period during which the apparatus is in a synchronization-standby mode and that is a difference between the time indicated by the first time information and a time that is indicated by second time information and at which the specific apparatus receives a last execution result among execution results of threads that are assigned to the plurality of apparatuses; and 
 set, in an ascending order of the synchronization standby period, a priority level of an access right for each of the plurality of other apparatuses to access the shared memory when executing a new thread that executes the processing to access the shared memory. 
 
     
     
       5. The thread processing system according to  claim 4 , wherein
 the specific apparatus is configured to notify the plurality of other apparatuses of information concerning the priority level of the access right to access the shared memory. 
 
     
     
       6. The thread processing system according to  claim 4 , wherein
 each of the plurality of other apparatuses is configured to control a memory controller that controls access of the shared memory, according to the priority level of the access right to the shared memory.