Semiconductor device

Abstract

A semiconductor device includes a transistor, a semiconductor layer, an active region and a conductive layer. The active region is in the semiconductor layer. The conductive layer is configured to maintain a channel in the active region when the transistor is triggered to be conducted.

What is claimed is: 
     
       1. A semiconductor device, comprising:
 a semiconductor substrate; 
 a first transistor disposed on the semiconductor substrate, the first transistor including:
 a first semiconductor layer; 
 an active region in the first semiconductor layer; and 
 a first conductive layer underlying the first semiconductor layer, wherein a conductive feature electrically connects a source feature of the first transistor with the first conductive layer; 
 a second transistor disposed on the semiconductor substrate, the second transistor including: 
 a second semiconductor layer; 
 another active region in the second semiconductor layer; 
 a second conductive layer underlying the second semiconductor layer and electrically isolated from the first conductive layer. 
 
 
     
     
       2. The semiconductor device as claimed in  claim 1 , wherein the first conductive layer is biased at the same voltage level as a source terminal of the first transistor through the conductive feature. 
     
     
       3. The semiconductor device of  claim 1 , wherein the second semiconductor layer is electrically isolated from the first conductive layer by a barrier structure interposing the first and second semiconductor layers. 
     
     
       4. The semiconductor device of  claim 1 , wherein a barrier structure extends between the active region in the first semiconductor layer and the active region in the second semiconductor layer. 
     
     
       5. The semiconductor device of  claim 1 , wherein the first and second conductive layers are physically separated. 
     
     
       6. The semiconductor device of  claim 1 , wherein the first and second semiconductor layers are physically separated. 
     
     
       7. A semiconductor device, comprising:
 a substrate comprising a semiconductor material; and 
 a first transistor disposed on the substrate, including:
 a first semiconductor layer; 
 an active region defined in the first semiconductor layer; and 
 a first conductive layer under the first semiconductor layer and over the substrate, wherein the first conductive layer is configured to receive a voltage, the voltage level of the first conductive layer to determine whether a channel is held in the active region, and the conductive layer configured to be electrically isolated from the substrate; 
 
 a second transistor disposed on the substrate, including:
 a second semiconductor layer; 
 another active region defined in the second semiconductor layer; and 
 a second conductive layer under the second semiconductor layer and over the substrate wherein the second conductive layer is electrically isolated from the first conductive layer. 
 
 
     
     
       8. The semiconductor device as claimed in  claim 7 , wherein the first conductive layer is configured to generate a depletion region between the first conductive layer and the substrate. 
     
     
       9. The semiconductor device as claimed in  claim 7 , wherein the first conductive layer has the same voltage level as a source terminal of the first transistor. 
     
     
       10. The semiconductor device as claimed in  claim 7 , further comprising:
 a voltage source configured to provide a voltage to the first conductive layer; and 
 the second conductive layer connected to ground voltage. 
 
     
     
       11. A semiconductor device, comprising:
 a first transistor configured to receive a supply voltage, including:
 a first semiconductor layer; 
 a first active region defined in the first semiconductor layer; and 
 a first conductive layer configured to receive a voltage, the voltage level of the first conductive to determine whether a first channel is held in the first active region; and 
 
 a second transistor integrated with the first transistor, and configured to receive a reference voltage, the second transistor including:
 a second semiconductor layer; 
 a second active region defined in the second semiconductor layer; and 
 a second conductive layer electrically isolated from the first conductive layer, and configured to receive a voltage, the voltage level of the second conductive layer to determine whether a second channel is held in the second active region; 
 wherein the first transistor and the second transistor are formed on a single semiconductor substrate. 
 
 
     
     
       12. The semiconductor device as claimed in  claim 11 , wherein the first conductive layer is configured to maintain the first channel when the transistor is triggered to be conducted. 
     
     
       13. The semiconductor device as claimed in  claim 12 , further comprising:
 a voltage source configured to provide a voltage to the first conductive layer and wherein a voltage ground connection is provided to the second conductive layer. 
 
     
     
       14. The semiconductor device as claimed in  claim 13 , wherein a gate terminal of the first transistor is triggered by a signal, the signal having a voltage level equal to that of the first conductive layer. 
     
     
       15. The semiconductor device as claimed in  claim 12 , wherein the first conductive layer is biased at the same voltage level as a source terminal of the first transistor when the first transistor is triggered to be conducted. 
     
     
       16. The semiconductor device as claimed in  claim 15 , further comprising:
 a conductive feature coupling the source terminal of the first transistor to the first conductive layer. 
 
     
     
       17. The semiconductor device as claimed in  claim 11 , wherein the first semiconductor layer is physically separated from the second semiconductor layer. 
     
     
       18. The semiconductor device as claimed in  claim 17 , wherein the first semiconductor layer and the second semiconductor layer belong to a same III-V family, further comprising an isolation region between the first semiconductor layer and the second semiconductor layer to electrically isolate the first semiconductor layer from the second semiconductor layer. 
     
     
       19. The semiconductor device as claimed in  claim 17 , further comprising:
 a barrier structure, sandwiched between the first semiconductor layer and the second semiconductor layer, configured to physically isolate the first semiconductor layer and the second semiconductor layer. 
 
     
     
       20. The semiconductor device as claimed in  claim 19 , wherein the first conductive layer and the second conductive layer are physically isolated by the barrier structure.