Leadframe

Abstract

A leadframe includes an individual region to become a semiconductor device, and an outer frame part supporting the individual region through its peripheral edge. The thickness of the outer frame part is greater than the thickness of the individual region.

What is claimed is: 
     
       1. A leadframe, comprising:
 an individual region to become a semiconductor device, the individual region including a lead, the lead including a first surface and a second surface that are opposite to each other in a thickness direction of the leadframe; and 
 an outer frame part supporting the individual region through a peripheral edge thereof, the outer frame part including a first surface and a second surface that are opposite to each other in the thickness direction, 
 wherein a thickness of the outer frame part is greater than a thickness of an entirety of the individual region, 
 the lead extends from the outer frame part, and a peripheral edge of the second surface of the lead is stepped toward the first surface of the lead to form a step part along three sides of the second surface of the lead, 
 the second surface of the outer frame part and the second surface of the lead except for the step part are in a first plane, and 
 the first surface of the lead and the second surface of the step part of the lead are positioned between the first plane and a second plane in which the first surface of the outer frame part is positioned. 
 
     
     
       2. The leadframe as claimed in  claim 1 , wherein
 the individual region includes a covered region to be covered with an encapsulation resin, 
 an uneven surface part including depressions is formed in the covered region, 
 a planar shape of each of the depressions is a circle whose diameter is greater than or equal to 0.020 mm and smaller than or equal to 0.060 mm or a polygon whose circumcircle has a diameter of greater than or equal to 0.020 mm and smaller than or equal to 0.060 mm, and 
 a ratio of a surface area of the uneven surface part to a surface area of a planar surface in a case of forming the uneven surface part in the planar surface is 1.7 or more. 
 
     
     
       3. The leadframe as claimed in  claim 2 , wherein
 the covered region includes a connection region to be connected to a semiconductor chip, and 
 the uneven surface part is formed in the connection region. 
 
     
     
       4. The leadframe as claimed in  claim 2 , wherein:
 a surface of the uneven surface part is plated, and 
 the surface area of the uneven surface part is an area of the plated surface of the uneven surface part. 
 
     
     
       5. A leadframe, comprising:
 a plurality of individual regions to become semiconductor devices, the plurality of individual regions each including a lead, the lead including a first surface and a second surface that are opposite to each other in a thickness direction of the leadframe; 
 an outer frame part having a frame shape to surround and support the plurality of individual regions, the outer frame part including a first surface and a second surface that are opposite to each other in the thickness direction; and 
 a dam bar connected to the outer frame part to be positioned between the plurality of individual regions within the outer frame part, 
 wherein a thickness of the outer frame part is greater than a thickness of an entirety of each of the plurality of individual regions, 
 the lead extends from the outer frame part or the dam bar, and a peripheral edge of the second surface of the lead is stepped toward the first surface of the lead to form a step part along three sides of the second surface of the lead, 
 the second surface of the outer frame part and the second surface of the lead except for the step part are in a first plane, and 
 the first surface of the lead and the second surface of the step part of the lead are positioned between the first plane and a second plane in which the first surface of the outer frame part is positioned. 
 
     
     
       6. The leadframe as claimed in  claim 5 , wherein the thickness of the outer frame part is greater than a thickness of the dam bar. 
     
     
       7. The leadframe as claimed in  claim 5 , wherein
 each of the plurality of individual regions includes a covered region to be covered with an encapsulation resin, 
 an uneven surface part including depressions is fowled in the covered region of each of the plurality of individual regions, 
 a planar shape of each of the depressions is a circle whose diameter is greater than or equal to 0.020 mm and smaller than or equal to 0.060 mm or a polygon whose circumcircle has a diameter of greater than or equal to 0.020 mm and smaller than or equal to 0.060 mm, and 
 a ratio of a surface area of the uneven surface part to a surface area of a planar surface in a case of forming the uneven surface part in the planar surface is 1.7 or more. 
 
     
     
       8. The leadframe as claimed in  claim 7 , wherein
 the covered region of each of the plurality of individual regions includes a connection region to be connected to a semiconductor chip, and 
 the uneven surface part is formed in the connection region. 
 
     
     
       9. The leadframe as claimed in  claim 7 , wherein:
 a surface of the uneven surface part is plated, and 
 the surface area of the uneven surface part is an area of the plated surface of the uneven surface part. 
 
     
     
       10. The leadframe as claimed in  claim 5 , further comprising:
 a plurality of support bars each provided in one of the plurality of individual regions to be connected to at least one of the outer frame part and the dam bar, 
 wherein the thickness of the outer frame part is greater than a thickness of the plurality of support bars. 
 
     
     
       11. The leadframe as claimed in  claim 5 , wherein the thickness of the outer frame part is equal to a thickness of the dam bar. 
     
     
       12. A semiconductor device, comprising:
 a leadframe including a lead; 
 a semiconductor chip mounted on the leadframe; and 
 an encapsulation resin encapsulating the leadframe and the semiconductor chip, 
 wherein an uneven surface part including depressions is provided in a surface of the lead, 
 wherein a planar shape of each of the depressions is a circle whose diameter is greater than or equal to 0.020 mm and smaller than or equal to 0.060 mm or a polygon whose circumcircle has a diameter of greater than or equal to 0.020 mm and smaller than or equal to 0.060 mm, and 
 wherein a ratio of a surface area of the uneven surface part to a surface area of a planar surface in a case of forming the uneven surface part in the planar surface is 1.7 or more. 
 
     
     
       13. The semiconductor device as claimed in  claim 12 , further comprising:
 a connecting member electrically connecting the semiconductor chip and the surface of the lead, and encapsulated in the encapsulation resin. 
 
     
     
       14. The semiconductor device as claimed in  claim 13 , wherein the connecting member is a metal wire or a metal bump. 
     
     
       15. The semiconductor device as claimed in  claim 12 , further comprising:
 a metal wire connecting the semiconductor chip and the surface of the lead, and encapsulated in the encapsulation resin, 
 wherein the leadframe further includes a die pad, and the semiconductor chip is mounted on a surface of the die pad. 
 
     
     
       16. The semiconductor device as claimed in  claim 15 , wherein the uneven surface part is further provided in the surface of the die pad. 
     
     
       17. The leadframe as claimed in  claim 1 , wherein
 the individual region further includes
 a die pad on which a semiconductor chip is to be mounted, the die pad including a first surface and a second surface that are opposite to each other in the thickness direction; and 
 a support bar connected to the outer frame part, the support bar including a first surface and a second surface that are opposite to each other in the thickness direction, 
 
 the second surface of the die pad is in the first plane, and 
 the first surface of the die pad and the first surface and the second surface of the support bar are positioned between the first plane and the second plane. 
 
     
     
       18. The leadframe as claimed in  claim 5 , wherein
 each of the plurality of individual regions further includes
 a die pad on which a semiconductor chip is to be mounted, the die pad including a first surface and a second surface that are opposite to each other in the thickness direction; and 
 a support bar connected to at least one of the outer frame part and the dam bar, the support bar including a first surface and a second surface that are opposite to each other in the thickness direction, 
 
 the second surface of the die pad is in the first plane, and 
 the first surface of the die pad and the first surface and the second surface of the support bar are positioned between the first plane and the second plane. 
 
     
     
       19. The leadframe as claimed in  claim 5 , wherein
 the dam bar includes a first surface and a second surface that are opposite to each other in the thickness direction, 
 the second surface of the dam bar is in the first plane, and 
 the first surface of the dam bar is positioned between the first plane and the second plane. 
 
     
     
       20. The leadframe as claimed in  claim 5 , wherein
 the dam bar includes a first surface and a second surface that are opposite to each other in the thickness direction, 
 the first surface of the dam bar is in the second plane, and 
 the second surface of the dam bar is positioned between the first plane and the second plane.