US9818701B2ActiveUtilityA1

Semiconductor device, semiconductor wafer and manufacturing method of semiconductor device

Assignee: FUJITSU SEMICONDUCTOR LTDPriority: Sep 15, 2011Filed: Apr 1, 2016Granted: Nov 14, 2017
Est. expirySep 15, 2031(~5.1 yrs left)· nominal 20-yr term from priority
H10W 72/932H10W 72/9232H10W 72/983H10P 74/277H10P 54/00H10W 46/603H10W 46/503H10W 46/00H10W 42/00H10W 20/4421H10W 20/4405H10W 20/42H10W 42/121H01L 23/562H01L 2224/05093H01L 2224/05553H01L 23/5226H01L 2924/13091H01L 23/53228H01L 23/564H01L 22/34H01L 2223/5446H01L 2223/5448H01L 2924/00H01L 23/53214H01L 24/05H01L 21/78H01L 23/544H01L 2224/02166
83
PatentIndex Score
4
Cited by
47
References
6
Claims

Abstract

A semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers, and a via-plug in the via-layer connecting the conductive films of the wiring layers above and below, a scribe region at an outer periphery of a chip region along an edge of the semiconductor substrate and including a pad region in the vicinity of the edge, the pad region overlapping the conductive films of the plurality of wiring layers in the plan view, the plurality of wiring layers including first second wiring layers, the conductive film of the first wiring layer includes a first conductive pattern formed over an entire surface of said pad region in a plan view, and the conductive film of the second wiring layer includes a second conductive pattern formed in a part of the pad region in a plan view.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising:
 a semiconductor substrate having a chip region, a scribe region located at an outer periphery of said chip region, and a pad region located in said scribe region; 
 a seal ring located between said chip region and said scribe region, the seal ring being apart from the pad region; 
 a wiring layer, formed over said semiconductor substrate, including a first conductive pattern and a plurality of second conductive patterns each disposed within said pad region, said first conductive pattern being disposed along a periphery of said pad region, said second conductive patterns being disposed in an inner area of said pad region with a mutual separation, and said second conductive patterns being electrically isolated from each other; 
 a first insulating film formed over said wiring layer; 
 an uppermost wiring layer, formed over said first insulating film, including a third conductive pattern overlapped with both of said first and second conductive patterns, said third conductive pattern being electrically connected to said first conductive pattern; 
 a second insulating film formed over said uppermost wiring layer, wherein said third conductive pattern is exposed from said second insulating film within said pad region; 
 a third insulating film, formed under said wiring layer; and 
 a lower wiring layer, formed under said third insulating film, including a fourth conductive pattern disposed in said pad region, said second conductive patterns being electrically isolated from said first, third and fourth conductive patterns. 
 
     
     
       2. The semiconductor device as claimed in  claim 1 , wherein said second conductive patterns comprise a plurality of rectangular patterns. 
     
     
       3. The semiconductor device as claimed in  claim 1 , wherein said second conductive patterns are disposed apart inward from an edge of said semiconductor substrate. 
     
     
       4. The semiconductor device as claimed in  claim 3 , wherein said pad region is defined by a first peripheral part opposing said edge of said semiconductor substrate, a second peripheral part reaching said edge and said first peripheral part and a third peripheral part reaching said edge and said first outer peripheral part, said first conductive pattern being disposed along said first, second, and third peripheral parts. 
     
     
       5. The semiconductor device as claimed in  claim 1 , wherein said first and second conductive patterns are formed of a copper and said third conductive pattern is formed of aluminum. 
     
     
       6. The semiconductor device as claimed in  claim 1 , further comprising at least a part of a monitoring device disposed in said scribe region, wherein said monitoring device is electrically connected to said third conductive pattern.

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