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US9935169B2ActiveUtilityPatentIndex 73

Semiconductor device and method of manufacturing the same

Assignee: FUJI ELECTRIC CO LTDPriority: Aug 11, 2015Filed: Jun 21, 2016Granted: Apr 3, 2018
Est. expiryAug 11, 2035(~9.1 yrs left)· nominal 20-yr term from priority
Inventors:NISHIMURA TAKEYOSHI
H10W 90/754H10W 90/00H10W 72/59H10W 40/00H01L 27/0727H01L 29/1095H01L 25/18H01L 29/7396H01L 23/34H10D 30/66H10D 62/127H10D 12/441H10D 84/811H10D 84/143H10D 62/111H10D 12/461H10D 8/00H10D 84/01H10D 62/393
73
PatentIndex Score
3
Cited by
8
References
15
Claims

Abstract

A semiconductor device includes a drift layer of a first conductivity-type, having a super junction structure, including a plurality of columns of a second conductivity-type, a plane pattern of each of the columns extends along a parallel direction to the principal surface of the layer, the columns are arranged at regular intervals; a plurality of well regions of the second conductivity-type provided in a surface-side layer of the layer of the first conductivity-type; a plurality of source regions of the first conductivity-type selectively provided in the plurality of well regions; a gate insulating film provided on the principal surface; an array of gate electrodes disposed on the gate insulating film, each of the gate electrodes is provided so as to bridge the corresponding source regions in a pair of neighboring two well regions; and a temperature detection diode provided at a partial area defined in the array of the gate electrodes.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising:
 a drift layer of a first conductivity-type, including a plurality of columns of a second conductivity-type, a plane pattern of each of the columns of the second conductivity-type extends along a first direction parallel to the principal surface of the layer of the first conductivity-type, the columns of the second conductivity-type are arranged at regular intervals, interdigitally sandwiching columns of the first conductivity-type made of the drift layer so as to implement a drift layer having a superjunction structure in which the columns of the first conductivity-type and the columns of the second conductivity-type are arranged side by side; 
 a plurality of well regions of the second conductivity-type provided in a surface-side layer of the layer of the first conductivity-type; 
 a plurality of source regions of the first conductivity-type selectively provided in the plurality of well regions; 
 a gate insulating film provided on the principal surface; 
 an array of gate electrodes disposed on the gate insulating film, each of the gate electrodes is provided so as to bridge the corresponding source regions in a pair of neighboring two well regions; and 
 a temperature detection diode provided at a partial area defined in the array of the gate electrodes, 
 wherein at least one column among the columns has a first line width in a second direction, the temperature detection diode has a second line width in the second direction, and the first line width is equal to the second line width, and 
 wherein the second direction is perpendicular to the first direction. 
 
     
     
       2. The semiconductor device of  claim 1 , wherein the temperature detection diode is allocated above a middle area of the layer of the first conductivity-type, which implements the drift layer, in a plane pattern. 
     
     
       3. The semiconductor device of  claim 2 , wherein the temperature detection diode is implemented by a plurality of p-n junction diodes connected in series. 
     
     
       4. The semiconductor device of  claim 3 , wherein the temperature detection diode is isolated from the array of the gate electrodes. 
     
     
       5. The semiconductor device of  claim 4 , wherein the source regions are not provided just below the temperature detection diode. 
     
     
       6. The semiconductor device of  claim 5 , wherein a plane pattern of each of the well regions is stripe, extending along the first direction parallel to the principal surface. 
     
     
       7. The semiconductor device of  claim 6 , wherein a plane pattern of each of the gate electrodes is stripe, extending along the first direction parallel to the principal surface. 
     
     
       8. The semiconductor device of  claim 7 , wherein all of the widths of the plurality of the columns of the second conductivity-type are same. 
     
     
       9. The semiconductor device of  claim 8 , wherein a plane pattern of each of the columns of the second conductivity-type in the drift layer is stripe. 
     
     
       10. The semiconductor device of  claim 9 , wherein the well regions are provided on the plurality of the columns of the second conductivity-type. 
     
     
       11. The semiconductor device of  claim 8 , wherein a plane pattern of the plurality of the columns of the second conductivity-type in the drift layer implements a grid. 
     
     
       12. The semiconductor device of  claim 11 , wherein each of the columns of the second conductivity-type is separated in vertical direction to the principal surface. 
     
     
       13. A semiconductor device comprising:
 a drift layer of a first conductivity-type, including a plurality of columns of a second conductivity-type, a plane pattern of each of the columns of the second conductivity-type extends along a first direction parallel to the principal surface of the layer of the first conductivity-type, the columns of the second conductivity-type are arranged at regular intervals, interdigitally sandwiching columns of the first conductivity-type made of the drift layer so as to implement a drift layer having a superjunction structure in which the columns of the first conductivity-type and the columns of the second conductivity-type are arranged side by side;
 a plurality of well regions of the second conductivity-type provided in a surface-side layer of the layer of the first conductivity-type; 
 a plurality of source regions of the first conductivity-type selectively provided in the plurality of well regions; 
 a gate insulating film provided on the principal surface; 
 an array of gate electrodes disposed on the gate insulating film, each of the gate electrodes is provided so as to bridge the corresponding source regions in a pair of neighboring two well regions; 
 an interlayer dielectric provided on the array of gate electrodes; and 
 a temperature detection diode provided on the interlayer dielectric, 
 wherein at least one column among the columns has a first line width in a second direction, the temperature detection diode has a second line width in the second direction, and the first line width is equal to the second line width, and 
 wherein the second direction is perpendicular to the first direction. 
 
 
     
     
       14. The semiconductor device of  claim 13 , wherein the temperature detection diode has a same width and same thickness as the gate electrodes. 
     
     
       15. The semiconductor device of  claim 14 , wherein the source regions are not provided just below the temperature detection diode.

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