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US9941389B2ActiveUtilityPatentIndex 49

Fabricating large area multi-tier nanostructures

Assignee: UNIV TEXASPriority: Apr 20, 2015Filed: Apr 19, 2016Granted: Apr 10, 2018
Est. expiryApr 20, 2035(~8.8 yrs left)· nominal 20-yr term from priority
Inventors:SREENIVASAN SIDLGATA VJoseph PraveenABED OVADIAGrigas MichelleMALLAVARAPU AKHILAAjay Paras
H10P 14/69215H10P 14/6339H10P 76/4085H10P 76/20H10P 50/695H10P 50/692H10P 50/642H10P 50/73H10P 14/44H10W 10/17H10W 10/014G03F 7/2022G03F 7/0002G02B 6/124G02B 5/1857H01L 21/31144H01L 21/2855H01L 29/66515H01L 21/02164H01L 29/66545H01L 28/90H01L 21/3086H01L 21/30604H01L 29/6659H01L 29/665H01L 21/3081H01L 21/76224H01L 29/6653H01L 21/0228H10D 30/0212H10D 1/716H10D 64/017H10D 64/015H10D 30/0215H10D 30/0227H10P 76/2041
49
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Claims

Abstract

Methods for fabricating and replicating self-aligned multi-tier nanoscale structures for a variety of cross-sectional geometries. These methods can utilize a single lithography step whereby the need for alignment and overlay in the process is completely eliminated thereby enabling near-zero overlay error. Furthermore, techniques are developed to use these methods to fabricate self-aligned nanoscale multi-level/multi-height patterns with various shapes for master templates, replica templates and nanoimprint based pattern replication. Furthermore, the templates can be used to pattern multiple levels in a sacrificial polymer resist and achieve pattern transfer of the levels into a variety of substrates to form completed large area nanoelectronic and nanophotonic devices using only one patterning step.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A method for fabricating self-aligned nanoscale multi-tier templates, the method comprising:
 sputtering a layer of an etch stop onto a wafer; 
 depositing a layer of a template material onto said layer of said etch stop; 
 patterning a resist on said template material; 
 performing a first level etch of said template material using said resist as a mask; 
 removing said resist followed by depositing spacer material on said template material; 
 anisotropic etching of said spacer material to define side walls spacers; 
 performing a second level etching of said template material using said side wall spacers as a mask until reaching said etch stop; and 
 removing said side wall spacers to reveal self-aligned multi-tier features in said template material. 
 
     
     
       2. The method as recited in  claim 1 , wherein said template material comprises silicon dioxide, wherein said spacer material comprises titanium nitride, wherein said etch stop comprises indium tin oxide. 
     
     
       3. The method as recited in  claim 1 , wherein said template material comprises silicon, wherein said spacer material comprises silicon dioxide, wherein said etch stop comprises silicon dioxide. 
     
     
       4. The method as recited in  claim 1 , wherein said resist is patterned on said template material using one of the following: nanoimprint lithography, electron beam lithography and photolithography. 
     
     
       5. The method as recited in  claim 1 , wherein said self-aligned multi-tiered features correspond to a master template. 
     
     
       6. The method as recited in  claim 1 , wherein said self-aligned multi-tiered features comprise one of the following: a multi-tiered grating, a multi-tiered trench, a multi-tiered cylinder, a multi-tiered hole, a tube structure, a shaped multi-tiered pillar, a shaped multi-tiered hole, and a shaped tubed structure. 
     
     
       7. The method as recited in  claim 6 , wherein said shaped multi-tiered pillar, said shaped multi-tiered hole and said shaped tubed structure have cross sections of one of the following: elliptical, triangular, quadrilateral, diamond, polygonal, star shaped and serpentine.

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