USRE37259EExpiredUtilityPatentIndex 99
Multibit single cell memory element having tapered contact
Est. expiryApr 19, 2016(expired)· nominal 20-yr term from priority
Inventors:OVSHINSKY STANFORD R
G11C 2013/008G11C 11/5678G11C 11/56G11C 13/0004G11C 2213/52G11C 13/0069G11C 11/00H10N 70/826H10N 70/026H10N 70/8418H10N 70/8828H10N 70/231
99
PatentIndex Score
669
Cited by
8
References
26
Claims
Abstract
An electrically operated, directly overwritable, multibit, single-cell chalcogenide memory element with multibit storage capabilities and having at least one contact for supplying electrical input signals to set the memory element to a selected resistance value, the second contact tapering to a peak adjacent to the memory element. In this manner the tapered contact helps define the size and position of a conduction path through the memory element.
Claims
exact text as granted — not AI-modifiedWe claim:
1. In an electrically operated, directly overwritable, multibit, single-cell memory element including:
a volume of memory material defining a single cell memory element including at least one chalcogen element and at least one transition metal element and said memory material characterized by (1) a large dynamic range of electrical resistance values, and (2) the ability for at least a filamentary portion of said memory material to be set to one of a plurality of resistance values within said dynamic range in response to selected electrical input signals so as to provide said single-cell memory element with multibit storage capabilities;
at least a filamentary portion of said single cell memory element being setable, by said selected electrical signal to any resistance value in said dynamic range, regardless of the previous resistance value of said material;
first and second disposed contacts for supplying said electrical input signal to set said memory material to a selected resistance value within said dynamic range;
the improvement comprising, in combination:
said second contact tapering to a peak adjacent said memory material.
2. The memory element of claim 1 , wherein said chalcogen element is selected from the group of Te, Se, Ge, Sb and mixtures thereof.
3. The memory element of claim 1 , wherein said first contact includes an adjacent thin-film layer adjacent said memory material.
4. The memory element of claim 3 , wherein said adjacent thin-film layer is comprised of carbon material.
5. The memory element of claim 3 , wherein said adjacent thin-film layer includes Ti, and two or more elements selected from the group consisting of C, N, Al, Si and mixtures or alloys thereof.
6. The memory element of claim 3 , wherein the thickness of said adjacent thin-film layer is about 100 Å to 2000 Å.
7. The memory element of claim 1 , wherein said first contact further includes a remote thin-film layer spacedly disposed from said memory material.
8. The memory element of claim 7 , wherein said remote thin-film layer is comprised of one or more elements selected from the group consisting of Ti, W, Mo and mixtures or alloys thereof.
9. The memory element of claim 7 , wherein the thickness of said remote thin-film contact layer is about 100 Å to 4000 Å.
10. The memory element of claim 1 , wherein the cross-sectional diameter of the peak of said second contact is less than 2000 Å.
11. The memory element of claim 1 , wherein the cross-sectional diameter of said peak is less than 1000 Å.
12. The memory element of claim 1 , wherein the cross-sectional diameter of said peak is less than 500 Å.
13. The memory element of claim 1 , wherein said second spacedly disposed contact is conically pointed.
14. The memory element of claim 1 , wherein said second spacedly disposed contact is pyramidally pointed.
15. The memory element of claim 1 , wherein said second spacedly disposed contact further comprises a first thin-film layer.
16. The memory element of claim 15 , wherein said first thin-film layer includes Ti, and two or more elements selected from the group consisting of C, N, Al, Si and mixtures or alloys thereof.
17. The memory element of claim 15 , wherein said second spacedly disposed contact further comprises a second thin-film layer comprised of one or more elements selected from the group consisting of Ti, W, Mo and mixtures or alloys thereof.
18. An electrically operated memory element, comprising:
a volume of memory material programmable to at least a first resistance state and a second resistance state in response to electrical input signals; and
first and second spacedly disposed contacts for supplying said electrical input signals, said second contact tapering to a peak adjacent said memory material.
19. The memory element of claim 18 , wherein said memory material comprises a phase change material.
20. The memory element of claim 18 , wherein said memory material comprises at least one chalcogen element.
21. The memory element of claim 18 , wherein said memory material is characterized by a dynamic range of electrical resistance values providing said memory element with multibit storage capabilities.
22. An electrically operated memory element, comprising:
a volume of memory material characterized by a dynamic range of electrical resistance values and the ability to be set directly to one of a plurality of resistance values within said dynamic range in response to selected electrical input signals, regardless of the previous resistance value of said material; and
first and second spacedly disposed contacts for supplying said electrical input signal to set said memory material to a selected resistance value within said dynamic range, said second contact tapering to a peak adjacent said memory material.
23. The memory element of claim 22 , wherein said dynamic range provides said memory element with multibit storage capabilities.
24. The memory element of claim 21 , wherein said memory material comprises at least one chalcogen element.
25. In an electrically operated memory element including:
a volume of memory material defining a single cell memory element, said memory material characterized by ( 1 ) a large dynamic range of electrical resistance values, and ( 2 ) the ability for at least a filamentary portion of said memory material to be set to one of a plurality of resistance values within said dynamic range in response to selected electrical input signals so as to provide said single - cell memory element with multibit storage capabilities;
at least a filamentary portion of said single cell memory element being setable, by said selected electrical signal to any resistance value in said dynamic range, regardless of the previous resistance value of said material;
first and second spacedly disposed contacts for supplying said electrical input signal to set said memory material to a selected resistance value within said dynamic range;
the improvement comprising, in combination:
said second contact tapering to a peak adjacent said memory material.
26. The memory element of claim 25 , wherein said memory material comprises at least one chalcogen element.Cited by (0)
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