Process for the production of thin semiconductor material films

Abstract

Process for the preparation of thin monocrystalline or polycrystalline semiconductor material films, characterized in that it comprises subjecting a semiconductor material wafer having a planar face to the three following stages: a first stage of implantation by bombardment ( 2 ) of the face ( 4 ) of the said wafer ( 1 ) by means of ions creating in the volume of said wafer a layer ( 3 ) of gaseous microbubbles defining in the volume of said wafer a lower region ( 6 ) constituting the mass of the substrate and an upper region ( 5 ) constituting the thin film, a second stage of intimately contacting the planar face ( 4 ) of said wafer with a stiffener ( 7 ) constituted by at least one rigid material layer, a third stage of heat treating the assembly of said wafer ( 1 ) and said stiffener ( 7 ) at a temperature above that at which the ion bombardment ( 2 ) was carried out and sufficient to create by a crystalline rearrangement effect in said wafer ( 1 ) and a pressure effect in the said microbubbles, a separation between the thin film ( 5 ) and the mass of the substrate ( 6 ).

1. Process for the preparation of thin semiconductor material films, wherein the process comprises subjecting a semiconductor material wafer having a planar face and whose plane,  is substantially parallel to a principal crystallographic plane, to the three following stages:
 a first stage of implantation by ion bombardment of the face of said wafer by means of ions creating in the volume of said wafer at a depth close to the average penetration depth of said ions, a layer of gaseous microbubbles defining in the volume of said wafer a lower region constituting a majority of the substrate and an upper region constituting the thin semiconductor material film, the ions being chosen from among  hydrogen gas ions or rare gas ions  and, wherein the temperature of the wafer during implantation being  is kept below the temperature at which the gas produced by the implanted ions can escape from the semiconductor by diffusion,  
 a second stage of intimately contacting the planar face of said wafer with a stiffener constituted by at least one rigid material layer,  
 a third stage of thermally treating the assembly of said wafer and said stiffener at a temperature above that at which the ion bombardment takes place and adequate to create by a crystalline rearrangement effect in the wafer, a coalescence of hydrogen microbubbles and a pressure effect in the hydrogen microbubbles, a separation between the thin semiconductor material film and the majority of the substrate, the stiffener and the planar face of the wafer being kept in intimate contact during said stage.  
 
     
     
       2. Process for the preparation of thin semiconductor material films according to  claim 1 , wherein the stage of implanting ions in the semiconductor material takes place through one or more layers of materials having a nature and thickness such that they can be traversed by the ions. 
     
     
       3. Process for the production  preparation of thin semiconductor material films according to  claim 1 , wherein the semiconductor comprises a group IV material. 
     
     
       4. Process for the production  preparation of thin semiconductor material films according to  claim 1  , wherein the process comprises subjecting a semiconductor is  material wafer of silicon,  having a planar face and whose plane is substantially parallel to a principal crystallographic plane, to the three following stages:
   a first stage of implantation by ion bombardment of the face of said wafer by means of ions creating in the volume of said wafer at a depth close to the average penetration depth of said ions, a layer of gaseous microbubbles defining in the volume of said wafer a lower region constituting a majority of the substrate and an upper region constituting the thin semiconductor material film, wherein  the implanted ion is aions are hydrogen gas ion,ions and the wafer temperature during implantation is kept below the temperature at which the gas produced by the implanted ions can escape from the semiconductor by diffusion and between 20° and 450° C., and 
 a second stage of intimately contacting the planar face of said wafer with a stiffener constituted by at least one rigid material layer, and  
   a third stage of thermally treating the assembly of said wafer and said stiffener at a temperature above that at which the ion bombardment takes place and adequate to create by a crystalline rearrangement effect in the wafer and a pressure effect in the microbubbles, a separation between the thin semiconductor material film and the majority of the substrate, the stiffener and the planar face of the wafer being kept in intimate contact during said stage,    
   wherein  the temperature of the third heat treatment stage exceeds 500° C.  
 
     
     
       5. Process for the production  preparation of thin semiconductor material films according to  claim 2 , wherein implantation takes place through an encapsulating thermal silicon oxide layer and the stiffener is a silicon wafer covered by at least one silicon oxide layer. 
     
     
       6. Process for the production  preparation of thin semiconductor material films according to  claim 1 , wherein the second stage of intimately contacting the planar face of said wafer with a stiffener takes place by applying an electrostatic pressure. 
     
     
       7. Process for the production  preparation of thin semiconductor material films according to  claim 1 , wherein the stiffener is deposited by one or more methods from within the group consisting of evaporation, sputtering, and chemical vapor deposition with or without plasma assistance or photon assistance. 
     
     
       8. Process for the production  preparation of thin semiconductor material films according to  claim 1 , wherein the stiffener is bonded to said wafer by means of an adhesive substrate. 
     
     
       9. Process for the production  preparation of thin semiconductor material films according to  claim 1 , wherein the stiffener is made to adhere to the wafer by a treatment favoring interatomic bonds. 
     
     
       10. Process for the preparation of thin semiconductor material films according to  claim 1  further comprising cleaving the thin semiconductor material film from the substrate.  
     
     
       11. Process for the preparation of thin semiconductor material films according to  claim 1 , wherein the thin semiconductor material films are formed as a continuous film of semiconductor material.  
     
     
       12. Process for the preparation of thin semiconductor material films according to  claim 1 , wherein the semiconductor material wafer comprises silicon.  
     
     
       13. Process for the preparation of thin semiconductor material films according to  claim 1 , wherein the semiconductor material wafer comprises germanium.  
     
     
       14. Process for the preparation of thin semiconductor material films according to  claim 1 , wherein the semiconductor material wafer comprises a silicon- germanium alloy.    
     
     
       15. Process for the preparation of thin semiconductor material films according to  claim 1 , wherein the semiconductor material wafer comprises silicon carbide.  
     
     
       16. Process for the preparation of thin semiconductor material films according to  claim 1 , wherein the stiffener comprises a silicon wafer covered by at least one silicon oxide layer.  
     
     
       17. Process for the preparation of thin semiconductor material films, wherein the process comprises subjecting a semiconductor material wafer having a planar face and whose plane is substantially parallel to a principal crystallographic plane, to the three following stages:
   a first stage of implantation by hydrogen ion bombardment of the face of said wafer by means of hydrogen ions creating in the volume of said wafer at a depth close to the average penetration depth of said ions, a layer of gaseous microbubbles defining in the volume of said wafer a lower region constituting a majority of the substrate and an upper region constituting the thin semiconductor material film, wherein the temperature of the wafer during implantation is kept below the temperature at which the gas produced by the implanted ions can escape from the semiconductor by diffusion,        a second stage of intimately contacting the planar face of said wafer with a stiffener constituted by at least one rigid material layer,        a third stage of thermally treating the assembly of said wafer and said stiffener at a temperature above that at which the ion bombardment takes place and adequate to create by a crystalline rearrangement effect in the wafer, a coalescence of hydrogen microbubbles and a pressure effect in the hydrogen microbubbles, a separation between the thin semiconductor material film and the majority of the substrate, the stiffener and the planar face of the wafer being kept in intimate contact during said stage.      
     
     
       18. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the stage of implanting ions in the semiconductor material takes place through one or more layers of materials having a nature and thickness such that they can be traversed by the ions.  
     
     
       19. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the semiconductor material comprises a group IV semiconductor.  
     
     
       20. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the semiconductor material wafer comprises silicon. 
     
     
       21. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the semiconductor material wafer comprises germanium.  
     
     
       22. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the semiconductor material wafer comprises a silicon- germanium alloy.    
     
     
       23. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the semiconductor material wafer comprises silicon carbide.  
     
     
       24. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein implantation takes place through an encapsulating thermal silicon oxide layer.  
     
     
       25. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the stiffener comprises a silicon wafer covered by at least one silicon oxide layer.  
     
     
       26. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the second stage of intimately contacting the planar face of said wafer with a stiffener takes place by applying an electrostatic pressure.  
     
     
       27. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the stiffener is deposited by one or more methods from within the group consisting of evaporation, sputtering, and chemical vapor deposition with or without plasma assistance or photon assistance.  
     
     
       28. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the stiffener is bonded to said wafer by means of an adhesive substance.  
     
     
       29. Process for the preparation of thin semiconductor material films according to  claim 17 , wherein the stiffener is made to adhere to the wafer by a treatment favoring interatomic bonds.  
     
     
       30. Process for the preparation of thin semiconductor material films according to  claim 17 , which further comprises cleaving the thin semiconductor material film from the substrate.  
     
     
       31. Process for the preparation of thin films according to  claim 17 , wherein the thin semiconductor material films are formed as a continuous film of semiconductor material.  
     
     
       32. Process for the preparation of thin semiconductor material films, wherein the process comprises subjecting a semiconductor material wafer having a planar face and whose plane is substantially parallel to a principal crystallographic plane, to the three following stages:
   a first stage of implantation by ion bombardment of the face of said wafer by means of ions creating in the volume of said wafer at a depth close to the average penetration depth of said ions, a layer of gaseous microbubbles defining in the volume of said wafer a lower region constituting a majority of the substrate and an upper region constituting the thin semiconductor material film, the ions consisting of hydrogen gas ions and, wherein the temperature of the wafer during implantation is kept below the temperature at which the gas produced by the implanted ions can escape from the semiconductor by diffusion,        a second stage of intimately contacting the planar face of said wafer with a stiffener constituted by at least one rigid material layer,        a third stage of thermally treating the assembly of said wafer and said stiffener at a temperature above that at which the ion bombardment takes place and adequate to create by a crystalline rearrangement effect in the wafer, a coalescence of hydrogen microbubbles and a pressure effect in the hydrogen microbubbles, a separation between the thin semiconductor material film and the majority of the substrate, the stiffener and the planar face of the wafer being kept in intimate contact during said stage.      
     
     
       33. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the stage of implanting ions in the semiconductor material takes place through one or more layers of materials having a nature and thickness such that they can be traversed by the ions.  
     
     
       34. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the semiconductor material comprises a group IV semiconductor.  
     
     
       35. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the semiconductor material wafer comrises silicon.  
     
     
       36. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the semiconductor material wafer comrises germanium.  
     
     
       37. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the semiconductor material wafer comrises a silicon- germanium alloy.    
     
     
       38. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the semiconductor material wafer comrises silicon carbide.  
     
     
       39. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein implantation takes place through an encapsulating thermal silicon oxide layer.  
     
     
       40. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the stiffener comprises a silicon wafer covered by at least one silicon oxide layer.  
     
     
       41. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the second stage of intimately contacting the planar face of said wafer with a stiffener takes place by applying an electrostatic pressure.  
     
     
       42. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the stiffener is deposited by one or more methods from within the group consisting of evaporation, sputtering, and chemical vapor deposition with or without plasma assistance or photon assistance.  
     
     
       43. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the stiffener is bonded to said wafer by means of an adhesive substance.  
     
     
       44. Process for the preparation of thin semiconductor material films according to  claim 32 , wherein the stiffener is made to adhere to the wafer by a treatment favoring interatomic bonds.  
     
     
       45. Process for the preparation of thin semiconductor material films according to  claim 32 , which further comprises cleaving the thin semiconductor material film from the substrate.  
     
     
       46. Process for the preparation of thin films according to  claim 32 , wherein the thin semiconductor material film is formed as a continuous film of semiconductor material.  
     
     
       47. Process for the preparation of thin semiconductor material films, wherein the process comprises subjecting a semiconductor material wafer having a planar face and whose plane is substantially parallel to a principal crystallographic plane, to the three following stages:
   a first stage of implantation by hydrogen ion bombardment of the face of said wafer so as to create in the volume of said wafer at a depth close to the average penetration depth of said ions, a layer of gaseous hydrogen microbubbles defining in the volume of said wafer a lower region constituting a majority of the substrate and an upper region constituting the thin semiconductor material film, wherein the temperature of the wafer during implantation is kept below the temperature at which the gas produced by the implanted ions can escape from the semiconductor by diffusion;        a second stage of intimately contacting the planar face of said wafer with a stiffener constituted by at least one rigid material layer, and        a third stage of thermally treating the assembly of said wafer and said stiffener at a temperature above that at which the ion bombardment takes place and adequate to create by a crystalline rearrangement effect in the wafer and a pressure effect in the microbubbles, a separation between the thin semiconductor material film and the majority of the substrate, the stiffener and the planar face of the wafer being kept in intimate contact during said stage.      
     
     
       48. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the stage of implanting ions in the semiconductor material takes place through one or more layers of materials having a nature and thickness such that they can be traversed by the ions.  
     
     
       49. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the semiconductor material comprises a group IV semiconductor.  
     
     
       50. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the semiconductor material wafer comprises silicon.  
     
     
       51. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the semiconductor material wafer comprises germanium.  
     
     
       52. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the semiconductor material wafer comprises a silicon- germanium alloy.    
     
     
       53. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the semiconductor material wafer comprises silicon carbide.  
     
     
       54. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein implantation takes place through an encapsulating thermal silicon oxide layer.  
     
     
       55. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the stiffener comprises a silicon wafer covered by at least one silicon oxide layer.  
     
     
       56. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the second stage of intimately contacting the planar face of said wafer with a stiffener takes place by applying an electrostatic pressure.  
     
     
       57. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the stiffener is deposited by one or more methods from within the group consisting of evaporation, sputtering, and chemical vapor deposition with or without plasma assistance or photon assistance.  
     
     
       58. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the stiffener is bonded to said wafer by means of an adhesive substance.  
     
     
       59. Process for the preparation of thin semiconductor material films according to  claim 47 , wherein the stiffener is made to adhere to the wafer by a treatment favoring interatomic bonds.  
     
     
       60. Process for the preparation of thin semiconductor material films according to  claim 47 , which further comprises cleaving the thin semiconductor material film from the substrate.  
     
     
       61. Process for the preparation of thin films according to  claim 47 , wherein the thin semiconductor material film is formed as a continuous film of semiconductor material.  
     
     
       62. Process for the preparation of thin semiconductor material films, wherein the process comprises subjecting a semiconductor material wafer having a planar face and whose plane is substantially parallel to a principal crystallographic plane, to the three following stages:
   a first stage of implantation by ion bombardment of the face of said wafer by means of hydrogen ions creating, by electronic braking in the wafer, in the volume of said wafer at a depth close to the average penetration depth of said ions, a layer of gaseous hydrogen microbubbles defining in the volume of said wafer a lower region constituting a majority of the substrate and an upper region constituting the thin semiconductor material film, wherein the temperature of the wafer during implantation is kept below the temperature at which the gas produced by the implanted ions can escape from the semiconductor by diffusion;        a second stage of intimately contacting the planar face of said wafer with a stiffener constituted by at least one rigid material layer,        a third stage of thermally treating the assembly of said wafer and said stiffener at a temperature above that at which the ion bombardment takes place and adequate to create by a crystalline rearrangement effect in the wafer and a coalescence of hydrogen microbubbles and a pressure effect in the hydrogen microbubbles, a separation between the thin semiconductor material film and the majority of the substrate, the stiffener and the planar face of the wafer being kept in intimate contact during said stage.      
     
     
       63. Process for the preparation of thin semiconductor material films according to  claim 62 , which further comprises cleaving the thin semiconductor material film from the substrate.  
     
     
       64. Process for the preparation of thin semiconductor material films according to  claim 62 , wherein the semiconductor material comprises silicon.  
     
     
       65. Process for the preparation of thin semiconductor material films according to  claim 64 , wherein the thickness of the thin semiconductor material film increases with increasing hydrogen implantation energy.  
     
     
       66. Process for the preparation of thin semiconductor material films according to  claim 65 , wherein the implantation takes place through a layer of thermal silicon oxide layer.  
     
     
       67. Process for the preparation of thin semiconductor material films according to  claim 62 , wherein the semiconductor material wafer comprises a monocrystalline silicon wafer.  
     
     
       68. Process for the preparation of thin semiconductor material films according to  claim 62 , wherein the planar face of the monocrystalline silicon wafer is substantially parallel to a  1 , 0 , 0  crystallographic plane of the monocrystalline silicon wafer.  
     
     
       69. Process for the preparation of thin semiconductor material films according to  claim 68 , wherein the hydrogen microbubbles are distributed in vicinity of the  1 , 0 , 0  crystallographic plane.  
     
     
       70. Process for the preparation of thin semiconductor material films according to  claim 69 , which further comprises cleaving the thin semiconductor material film from the substrate along the  1 , 0 , 0  crystallographic plane.