FPGA with hybrid interconnect

Abstract

An Application-Specific Field Programmable Gate Array (FPGA) device or fabric is described for use in applications requiring fast reconfigurability of devices in the field, enabling multiple personalities for re-using silicon resources (like arrays of large multipliers in DSP applications) from moment-to-moment for implementing different hardware algorithms. In a general purpose FPGA device or fabric, this fast reconfigurability is normally implemented by special reconfiguration support circuitry and/or additional configuration memory. Unfortunately, this flexibility requires a large amount of programmable routing resource and silicon area—limiting the viability in volume production applications. This invention describes how multi-program FPGA functionalities may be migrated to smaller die by constructing hybrid FPGA/ASIC implementations that retain the multi-program capability. Also described is a multi-program FPGA fabric architecture that uses a hybrid FPGA/ASIC interconnect structure, resulting in a much smaller silicon area when customized for a particular user application.

1. A method for constructing an integrated circuit to implement custom logic functionality, comprising:
 constructing diffusion and metal layers to construct a generic array of logic cells and field programmable switches, including a plurality of unconnected field programmable switches and unconnected logic cells; and  
 choosing a netlist corresponding to a particular end-user application to be implemented; and  
 completing the fabrication of said integrated circuit for the specific initial overall functionality of said particular end-user application by implementing in additional metal layers, a final connection layout with custom hard-wired metal connections between some of said unconnected logic cells and also incorporating custom hard-wired metal connections between some of said unconnected logic cells and said unconnected field programmable switches.  
 
     
     
       2. The method of  claim 1 , where said final connection layout also includes a plurality of uncommitted field programmable switches that are not required to implement said particular end-user application, such that alterations to the overall connectivity can be made in the field at a later time. 
     
     
       3. The method of  claim 1 , where said final connection layout also includes a plurality of uncommitted logic cells and uncommitted field programmable switches that are not required to implement said particular end-user application such that additional logic functionality can be field-programmably added to said initial overall functionality, such that alterations or additions to the overall logic functionality of said integrated circuit can be made in the field at a later time. 
     
     
       4. An integrated circuit, comprising:
   a plurality of field programmable switches and a plurality of logic cells, wherein the field programmable switches and the logic cells are formed in diffusion and metal layers, wherein the number of field programmable switches is less than a number of field programmable switches in an initial design of the integrated circuit, and wherein the difference is the number of field programmable switches omitted from the initial design when forming the integrated circuit;        a first subset of hardwired connections making a first plurality of connections in additional metal layers between ones of a first subset of the plurality of logic cells, wherein the first subset of hardwired connections are introduced to replace at least a first subset of the omitted field programming switches, modifying the initial design; and        a second subset of hardwired connections making a second plurality of connections in the additional metal layers between a second subset of the plurality of logic cells and the plurality of field programmable switches, wherein the second subset of hardwired connections are introduced to replace at least a second subset of the omitted field programming switches, modifying the initial design.     
     
     
       5. The integrated circuit of  claim 4 , wherein the first subset of hardwired connections at least partially implement a predetermined application. 
     
     
       6. The integrated circuit of  claim 5 , wherein the second subset of the plurality of logic cells and the plurality of field programmable switches are not required to implement the predetermined application. 
     
     
       7. The integrated circuit of  claim 5 , wherein the plurality of field programmable switches are configurable to alter the end-user application. 
     
     
       8. A hybrid application-specific and field programmable integrated circuit, comprising:
   a plurality of logic elements formed within metal and diffusion layers;        a plurality of hard-wired connections formed in additional metal layers coupling the plurality of logic elements in a pattern according to a netlist to implement a particular end-user application; and        a plurality of field programmable switches, wherein each field programmable switch is formed within the metal and diffusion layers and is coupled to two or more of the logic elements;        wherein the number of field programmable switches is less than a number of field programmable switches in an initial design of the integrated circuit, and wherein the difference is the number of field programmable switches omitted from the initial design when forming the integrated circuit; and        wherein the hardwired connections are introduced to replace at least a subset of the omitted field programming switches, modifying the initial design.     
     
     
       9. The hybrid application-specific and field programmable integrated circuit of  claim 8 , wherein the plurality of hard-wired connections coupling the plurality of logic elements according to the netlist implement an initial overall functionality of the particular end-user application. 
     
     
       10. The hybrid application-specific and field programmable integrated circuit of  claim 9 , wherein the plurality of field programmable switches is configurable to alter the end-user application. 
     
     
       11. The hybrid application-specific and field programmable integrated circuit of  claim 8 , wherein the plurality of field programmable switches is configurable to implement another end-user application.