USRE42658EExpiredUtility

Gate driver multi-chip module

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Assignee: INT RECTIFIER CORPPriority: Mar 22, 2000Filed: Apr 12, 2007Granted: Aug 30, 2011
Est. expiryMar 22, 2020(expired)· nominal 20-yr term from priority
Inventors:David Jauregui
H10W 90/754H10W 74/00H10W 72/5475H10W 72/5449H10W 72/932H10W 44/206H02M 3/1588H02M 7/003H02M 1/0009Y02B70/10
50
PatentIndex Score
0
Cited by
15
References
13
Claims

Abstract

A multi-chip module (MCM) provides power circuitry on a computer motherboard in a package of reduced size without sacrificing performance. The MCM co-packages essential power circuit components on a ball grid array (BGA) substrate. Two power MOSFETs disposed on the BGA substrate are connected in a half-bridge arrangement between an input voltage and ground. A MOSFET gate driver is electrically connected to respective gate inputs of the two power MOSFETs for alternately switching the power MOSFETs to generate an alternating output voltage at a common output node between the power MOSFETs. At least one Schottky diode is disposed on the BGA substrate and connected between the common output node and ground to minimize losses during deadtime conduction periods. The input capacitor of the circuit is contained within the MCM housing and is located close to the MOSFETs, reducing stray inductance in the circuit. The MCM package is thin and has dimensions of about 1 cm by 1 cm or less.

Claims

exact text as granted — not AI-modified
1. A multi-chip module (MCM) for providing power circuitry on a computer motherboard, comprising:
 a ball grid array (BGA) substrate having a first surface and a second opposing surface; 
 two power MOSFETs disposed on the first surface of the BGA substrate and connected in a half-bridge arrangement between an input voltage and ground; 
 a MOSFET gate driver disposed on the first surface of the BGA substrate and electrically connected to respective gate inputs of the two power MOSFETs for alternatively switching the power MOSFETs to generate an alternating output voltage at a common output node between the power MOSFETs; and 
 at least one diode disposed on the first surface of the BGA substrate and connected between the common output node and ground to minimize losses during deadtime connection periods; and 
 an input capacitor disposed on the first surface of the BGA and connected between the input voltage and ground; 
 wherein the input capacitor is located adjacent to, and spaced less than 1 cm from the first and second MOSFETs, and wherein the input capacitor and the first and second MOSFETs are positioned side-by-side. 
 
     
     
       2. The module of  claim 1 , further comprising another diode connected in parallel with the diode connected between the common output node and between the common output node and ground. 
     
     
       3. The module of  claim 1 , wherein the substrate has an area of about 1 cm by 1 cm or less. 
     
     
       4. The module of  claim 1 , which further includes an insulation housing enclosing the substrate, the MOSFETs, the gate driver and the at least one diode, the ball grid array being exposed through the bottom of the housing for mounting to a mother board. 
     
     
       5. A multichip module comprising:
 a substrate having a first surface and an opposing second surface; 
 a power input connection; 
 a ground connection; 
 two power switching devices disposed on said first surface of said substrate and connected in series according to a half-bridge arrangement between said power input connection and said ground connection, a terminal of one of said two power switching devices directly connected to said power input connection and a terminal of another of said two power switching devices directly connected to said ground connection; and 
 an input capacitor connected between said power input connection and said ground connection, wherein said input capacitor is disposed on said first surface of said substrate and spaced no more than one centimeter from said two either power switching devices device, and wherein said input capacitor and said power switching devices are positioned side-by-side. 
 
     
     
       6. A The multichip module according to  claim 5 , wherein said power switching devices are MOSFETs. 
     
     
       7. A The multichip module according to  claim 5 , wherein said substrate is a ball grid array. 
     
     
       8. A The multichip module according to  claim 5 , wherein said half-bridge connection includes an output node located between said two power switching devices, and further comprising at least one Schottky diode connected between said output node and said ground connection. 
     
     
       9. A The multichip module according to  claim 8 , further comprising another Schottky diode connected between said output node and said ground connection. 
     
     
       10. A The multichip module according to  claim 5 , further comprising a controller disposed on said substrate for selective control of the operation of said two power switching devices. 
     
     
       11. A The multichip module according to  claim 5 , wherein said multichip module is 1 cm by 1 cm or less. 
     
     
       12. A The multichip module according to  claim 5 , wherein said input capacitor reduces the stray inductance to reduce the ringing due to resonance in said at least one of said two power switching devices. 
     
     
       13. A The multichip module according to  claim 5 , wherein said input capacitor is disposed on said substrate and spaced no more than one centimeter from the low side power switching device in said half-bridge arrangement.

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