Full-water test and burn-in mechanism

Abstract

Assemblies include a substrate, such as a printed circuit board, with a first array of contact pads disposed thereon; a guide ring structure disposed on the substrate and at least partially surrounding the first array of contact pads; a translator socket disposed on the first array of contact pads, the translator socket adapted to receive the tester side of a translated wafer; a thermally conductive, conformal, heat spreading cushion adapted to be disposed over the backside of a wafer; a cover plate adapted to fit over the first array of contact pads, align with the guide ring structure, contain within it the various components disposed over the first array of contact pads, and removably attach to the substrate; and a bolster plate adapted to removably attach to a second side of the substrate. In a further aspect a translated wafer is disposed over the translator socket such that the tester side of the translator is in contact with the translator socket; and the heat spreading cushion is disposed over the backside of the translated wafer. In a still further aspect, the substrate includes signal communication means, such as but not limited to, an edge connector adapted to couple to various controller circuits, which are typically disposed on a printed circuit board.

What is claimed is: 
     
       1. A wafer-level burn-in assembly, comprising:
 a circuit board having a first major surface and a second major surface; 
 a first plurality of contact pads disposed in a first area of the first major surface of the circuit board, the first plurality of contact pads arranged in first pattern; 
 a guide ring disposed on the first major surface of the circuit board such that the guide ring is outside the first area; 
 a wafer burn-in socket having a first major surface and a second major surface, the first major surface having a plurality of contact pads arranged in a second pattern that matches the first pattern, the second major surface having a plurality of contact pads arranged in a third pattern, the first major surface of the wafer burn-in socket disposed on the circuit board; 
 a wafer translator having a first major surface and a second major surface, the first major surface having a plurality of contact pads arranged in a fourth pattern that matches the third pattern, the first major surface of the wafer translator disposed on the wafer burn-in socket; 
 a wafer attached to the second major surface of the wafer translator; 
 a heat spreader disposed against a side of the wafer facing away from the translator; 
 a cover disposed over the heat spreader; and 
 a controller board coupled to the circuit board. 
 
     
     
       2. The wafer-level burn-in assembly of  claim 1 , wherein the controller board and the circuit board are disposed within a burn-in oven. 
     
     
       3. The wafer-level burn-in assembly of  claim 2 , further comprising a first plurality of circuit boards coupled to corresponding ones of a first plurality of controller boards, each of the coupled pairs of circuit boards and controller boards are disposed within the burn-in oven and spatially arranged to form one or more stacks. 
     
     
       4. The wafer-level burn-in assembly of  claim 1 , further comprising a bolster plate disposed on the second major surface of the circuit board. 
     
     
       5. The wafer-level burn-in assembly of  claim 1 , wherein the guide ring comprises two or more discontinuous segments. 
     
     
       6. The wafer-level burn-in assembly of  claim 4 , wherein the guide ring has holes therethrough through which the cover is screwed to the bolster plate. 
     
     
       7. The wafer-level burn-in assembly of  claim 1 , wherein the circuit board has an edge connector comprising a plurality of contact pads each of which is electrically coupled to a corresponding one of the first plurality of contact pads disposed in the first area of the first major surface of the circuit board. 
     
     
       8. A wafer-level burn-in assembly, comprising:
 a circuit board having a first major surface and a second major surface; 
 a first plurality of contact pads disposed in a first area of the first major surface of the circuit board, the first plurality of contact pads arranged in first pattern; 
 a guide ring disposed on the first major surface of the circuit board such that the guide ring is outside the first area; 
 a wafer burn-in socket having a first major surface and a second major surface, the first major surface having a plurality of contact pads arranged in a second pattern that matches the first pattern, the second major surface having a plurality of contact pads arranged in a third pattern, the first major surface of the wafer burn-in socket disposed on the circuit board; 
 a translated wafer having a first surface comprising a wafer backside and a second surface comprising a wafer translator tester-side; 
 a heat spreader disposed against a side of the wafer facing away from the translator; 
 a cover disposed over the heat spreader; 
 a controller board coupled to the circuit board. 
 
     
     
       9. The wafer-level burn-in assembly of  claim 8 , wherein the controller board and the circuit board are disposed within a burn-in oven. 
     
     
       10. The wafer-level burn-in assembly of  claim 9 , further comprising a first plurality of circuit boards coupled to corresponding ones of a first plurality of controller boards, each of the coupled pairs of circuit boards and controller boards are disposed within the burn-in oven and spatially arranged to form one or more stacks. 
     
     
       11. The wafer-level burn-in assembly of  claim 8 , further comprising a bolster plate disposed on the second major surface of the circuit board. 
     
     
       12. The wafer-level burn-in assembly of  claim 8 , wherein the guide ring comprises two or more discontinuous segments. 
     
     
       13. The wafer-level burn-in assembly of  claim 11 , wherein the guide ring has holes therethrough through which the cover is screwed to the bolster plate. 
     
     
       14. The wafer-level burn-in assembly of  claim 8 , wherein the circuit board has an edge connector comprising a plurality of contact pads each of which is electrically coupled to a corresponding one of the first plurality of contact pads disposed in the first area of the first major surface of the circuit board. 
     
     
       15. A wafer-level burn-in assembly, comprising:
 a circuit board having a first major surface and a first plurality of contact pads arranged in a first pattern at a first area of the first major surface;   an interposer having
 a first major surface facing the first major surface of the circuit board, the first major surface of the interposer having a second plurality of contact pads arranged in a second pattern that corresponds to the first pattern of the circuit board, and 
 a second major surface of the interposer, the second major surface having a third plurality of contact pads arranged in a third pattern; and 
   a wafer translator having
 a first major surface facing the second major surface of the interposer, the first major surface of the wafer translator having a fourth plurality of contact pads arranged in a fourth pattern that corresponds to the third pattern of the interposer, and 
   a second major surface positioned to face toward a wafer;   a heat spreader disposed toward the wafer translator;   a cover disposed over the heat spreader; and   a guide ring adjacent to the cover, the guide ring having holes for fasteners.    
     
     
       16. A wafer-level burn-in assembly, comprising:
 a circuit board having a first major surface and a first plurality of contact pads arranged in a first pattern at a first area of the first major surface;   an interposer having
 a first major surface facing the first major surface of the circuit board, the first major surface of the interposer having a second plurality of contact pads arranged in a second pattern that corresponds to the first pattern of the circuit board, and 
 a second major surface of the interposer, the second major surface having a third plurality of contact pads arranged in a third pattern; 
   a wafer translator having
 a first major surface facing the second major surface of the interposer, the first major surface of the wafer translator having a fourth plurality of contact pads at a first scale and arranged in a fourth pattern that corresponds to the third pattern of the interposer, and 
 a second major surface having a fifth plurality of contact pads at a second scale and positioned to electrically contact for burn-in testing semiconductor dies of a wafer, 
 wherein the first scale is larger than the second scale; 
   a heat spreader facing toward the wafer translator; and   a cover disposed over the heat spreader.    
     
     
       17. The wafer-level burn-in assembly of claim 16, further comprising a bolster plate facing the circuit board opposite from the first major surface of the circuit board, the bolster plate attached to the cover.  
     
     
       18. The wafer-level burn-in assembly of claim 17, further comprising a guide ring between the bolster plate and the cover, the guide ring having holes for fasteners connecting the bolster plate and the cover.  
     
     
       19. The wafer-level burn-in assembly of claim 16, further comprising a controller board coupled to the circuit board.  
     
     
       20. The wafer-level burn-in assembly of claim 16, further comprising a plurality of edge connectors on the circuit board, the plurality of edge connectors in electrical contact with the corresponding plurality of contact pads on the circuit board.  
     
     
       21. A method for wafer-level burn-in, comprising:
 aligning a circuit board, an interposer and a wafer translator, the circuit board having
 a first major surface and a first plurality of contact pads arranged in a first pattern at a first area of the first major surface; 
   the interposer having
 a first major surface facing the first major surface of the circuit board, the first major surface of the interposer having a second plurality of contact pads arranged in a second pattern, and 
 a second major surface having a third plurality of contact pads arranged in a third pattern; 
   the wafer translator having
 a first major surface facing the second major surface of the interposer, the first major surface of the wafer translator having a fourth plurality of contact pads at a first scale and arranged in a fourth pattern, and 
 a second major surface having a fifth plurality of contact pads at a second scale and positioned to electrically contact for burn-in testing semiconductor dies of a wafer, wherein the first scale is larger than the second scale, and wherein aligning includes:
 aligning at least one of the first and second patterns with the other of the first and the second pattern, and 
 aligning at least one of the third and fourth patterns with the other of the third and fourth patterns; 
 
   disposing a heat spreader against the wafer translator; and   disposing a cover over the heat spreader.    
     
     
       22. The method of claim 21, further comprising:
 disposing a bolster plate against the circuit board opposite from the first major surface of the circuit board, and   attaching the bolster plate to the cover.    
     
     
       23. The method of claim 21, further comprising disposing a guide ring between the bolster plate and the cover, wherein the guide ring has holes for the fasteners connecting the bolster plate and the cover.  
     
     
       24. The method of claim 21, further comprising operably coupling a controller board to the circuit board through a plurality of corresponding edge connectors on the controller board and the circuit board.