Back-to-back metal/semiconductor/metal (MSM) Schottky diode

Abstract

A method is provided for forming a metal/semiconductor/metal (MSM) back-to-back Schottky diode from a silicon (Si) semiconductor. The method deposits a Si semiconductor layer between a bottom electrode and a top electrode, and forms a MSM diode having a threshold voltage, breakdown voltage, and on/off current ratio. The method is able to modify the threshold voltage, breakdown voltage, and on/off current ratio of the MSM diode in response to controlling the Si semiconductor layer thickness. Generally, both the threshold and breakdown voltage are increased in response to increasing the Si thickness. With respect to the on/off current ratio, there is an optimal thickness. The method is able to form an amorphous Si (a-Si) and polycrystalline Si (polySi) semiconductor layer using either chemical vapor deposition (CVD) or DC sputtering. The Si semiconductor can be doped with a Group V donor material, which decreases the threshold voltage and increases the breakdown voltage.

We claim: 
     
       1. A method for forming a metal/semiconductor/metal (MSM) back-to-back Schottky diode from a silicon (Si) semiconductor, the method comprising:
 providing a Si substrate; 
 forming a bottom electrode with a platinum (Pt) layer overlying the Si substrate, and a titanium nitride (TiN) layer overlying the Pt layer; 
 forming an amorphous Si (a-Si) semiconductor layer overlying the bottom electrode, having a thickness in the a range of about 10 nm to 80 nanometers (nm) nm; 
 forming a TiN top electrode overlying the a-Si semiconductor layer; and, 
 forming a MSM diode having wherein the formed MSM diode has a threshold voltage in the a range of about 0.8 volts to 2 volts, and a breakdown voltage in the range of about 2.5 volts to 6 volts. 
 
     
     
       2. The method for forming a MSM back-to-back Schottky diode from a Si semiconductor according to of  claim 1 , wherein said forming the an a-Si semiconductor layer includes comprises forming an a-Si layer with a thickness of about 30 nm; and, and wherein said forming the a MSM diode includes comprises forming an MSM diode with a threshold voltage of about 1.5 volts and a breakdown voltage of about 3.5 volts. 
     
     
       3. The method for forming a MSM back-to-back Schottky diode from a Si semiconductor according to of  claim 2 , wherein said forming the a MSM diode includes comprises forming an MSM diode with an on/off current ratio of about 1.5 ×10 2  amperes per square centimeters (A/cm 2 ) at 3 volts, to about 6 ×10 −2  A/cm 2  at 1 volt. 
     
     
       4. The method for forming a MSM back-to-back Schottky diode from a Si semiconductor according to  claim 1  further comprising: A method for forming a metal/semiconductor/metal (MSM) back-to-back Schottky diode from a silicon (Si) semiconductor, the method comprising:
 providing a Si substrate; 
 forming a bottom electrode with a platinum (Pt) layer overlying the Si substrate, and a titanium nitride (TiN) layer overlying the Pt layer; 
 forming an amorphous Si (a-Si) semiconductor layer overlying the bottom electrode, having a thickness in a range of about 10 to 80 nanometers (nm); 
 forming a TiN top electrode overlying the a-Si semiconductor layer; 
 doping the a-Si semiconductor layer with a Group V donor material; and, 
 wherein forming the MSM diode includes forming an MSM diode with wherein the formed MSM diode has a threshold voltage in the a range of about 2 volts to 3.5 volts and a breakdown voltage in the a range of about 6 volts to 12 volts. 
 
     
     
       5. The method for forming a MSM back-to-back Schottky diode from a Si semiconductor according to of  claim 4 , wherein said forming the an a-Si semiconductor layer includes comprises forming an a-Si layer with a thickness of about 30 nm; and, and wherein said forming the a MSM diode includes comprises forming an MSM diode with a threshold voltage of about 2.5 volts and a breakdown voltage of about 6 volts. 
     
     
       6. A metal/semiconductor/metal (MSM) back-to-back Schottky diode fabricated from a silicon (Si) semiconductor, comprising:
 a Si substrate; 
 a bottom electrode with a platinum (Pt) layer overlying the Si substrate, and a titanium nitride (TiN) layer overlying the Pt layer; 
 an amorphous Si (a-Si) semiconductor layer overlying the bottom electrode, having a thickness in the a range of 10 nm to 80 nanometers (nm) nm; and, 
 a TiN top electrode overlying the a-Si semiconductor layer, 
 wherein the MSM diode has a threshold voltage in a range of about 0.8 volts to 2 volts and a breakdown voltage in a range of about 2.5 volts to 6 volts. 
 
     
     
       7. The MSM back-to-back Schottky diode from a Si semiconductor according to  claim 6  wherein the MSM diode has a threshold voltage in the range of about 0.8 ; to 2 volts and a breakdown voltage in the range of about 2.5 to 6 volts. 
     
     
       8. The MSM back-to-back Schottky diode from a Si semiconductor according to  claim 6  A metal/semiconductor/metal (MSM) back-to-back Schottky diode fabricated from a silicon (Si) semiconductor, comprising:
 a Si substrate; 
 a bottom electrode with a platinum (Pt) layer overlying the Si substrate, and a titanium nitride (TiN) layer overlying the Pt layer; 
 an amorphous Si (a-Si) semiconductor layer overlying the bottom electrode, having a thickness in a range of 10 nm to 80 nm; and 
 a TiN top electrode overlying the a-Si semiconductor layer, 
 wherein the a-Si semiconductor layer has a thickness of about 30 nm; and, and wherein the MSM diode has a threshold voltage of about 1.5 volts, a breakdown voltage of about 3.5 volts, and an on/off current ratio of about 1.5 ×10 2  amperes per square centimeters (A/cm 2 ) at 3 volts, to about 6 ×10 −2  A/cm 2  at 1 volt. 
 
     
     
       9. The MSM back-to-back Schottky diode from a Si semiconductor according to  claim 6  A metal/semiconductor/metal (MSM) back-to-back Schottky diode fabricated from a silicon (Si) semiconductor, comprising:
 a Si substrate; 
 a bottom electrode with a platinum (Pt) layer overlying the Si substrate, and a titanium nitride (TiN) layer overlying the Pt layer; 
 an amorphous Si (a-Si) semiconductor layer overlying the bottom electrode, having a thickness in a range of 10 nm to 80 nm; and 
 a TiN top electrode overlying the a-Si semiconductor layer,  
 wherein the a-Si semiconductor layer includes comprises a Group V donor dopant material; and, and wherein the MSM diode has a threshold voltage in the a range of about 2 volts to 3.5 volts and a breakdown voltage in the a range of about 6 volts to 12 volts. 
 
     
     
       10. The MSM back-to-back Schottky diode from a Si semiconductor according to of  claim 9 , wherein the a-Si semiconductor layer has a thickness of about 30 nm; and, and wherein the MSM diode has a threshold voltage of about 2.5 volts and a breakdown voltage of about 6 volts. 
     
     
       11. A method for forming a diode, the method comprising:
 forming a bottom electrode on a substrate, wherein the bottom electrode includes a first electrically-conductive layer and a second electrically-conductive layer overlying the first electrically-conductive layer;   forming a deposited amorphous material overlying the bottom electrode, wherein the deposited amorphous material has a thickness in a range of about 10 nm to 80 nm; and   forming a top electrode overlying the deposited amorphous material, wherein the top electrode comprises a third electrically-conductive layer; and   wherein the formed diode has a threshold voltage in a range of about 0.8 volts to 2 volts and a breakdown voltage in a range of about 2.5 volts to 6 volts;   forming a metal/semiconductor/metal diode having a threshold voltage in a range of about 0.8 volts to 2 volts and a breakdown voltage in a range of about 2.5 volts to 6 volts.   
     
     
       12. The method of claim 11, wherein the first electrically-conductive layer comprises platinum, and wherein the second electrically-conductive layer comprises titanium nitride. 
     
     
       13. The method of claim 12, wherein the third electrically-conductive layer comprises titanium nitride. 
     
     
       14. The method of claim 11, wherein the first electrically-conductive layer and the second electrically-conductive layer each comprise at least one of Ir, Au, Ag, TiN, AlCu, Pd, W, Ti, Cr, Si, Al, Rh, Ta, Ru, TaN, YBCO, indium tin oxide, InO 3 , ZnO, RuO 2 , and La 1-x Sr x CoO 3 . 
     
     
       15. The method of claim 14, wherein the third electrically-conductive layer comprises at least one of Ir, Au, Ag, TiN, AlCu, Pd, W, Ti, Cr, Si, Al, Rh, Ta, Ru, TaN, YBCO, indium tin oxide, InO 3 , ZnO, RuO 2 , and La 1-x Sr x CoO 3 . 
     
     
       16. The method of claim 11, further comprising doping the deposited amorphous material with a Group V donor material. 
     
     
       17. An apparatus comprising:
 a substrate;   a bottom electrode including a first electrically-conductive layer overlying the substrate, and a second electrically-conductive layer overlying the first electrically-conductive layer;   a deposited amorphous material overlying the bottom electrode, wherein the deposited amorphous material has a thickness in a range of about 10 to 80 nanometers (nm); and   a top electrode overlying the deposited amorphous material, wherein the top electrode includes a third electrically-conductive layer,   wherein the apparatus comprises a metal/semiconductor/metal diode having a threshold voltage in a range of about 0.8 to 2 volts and a breakdown voltage in a range of about 2.5 volts to 6 volts.   
     
     
       18. The apparatus of claim 17, wherein the first electrically-conductive layer comprises platinum, and wherein the second electrically-conductive layer comprises titanium nitride. 
     
     
       19. The apparatus of claim 18, wherein the third electrically-conductive layer comprises titanium nitride. 
     
     
       20. The apparatus of claim 17, wherein the first electrically-conductive layer and the second electrically-conductive layer each comprise at least one of Ir, Au, Ag, TiN, AlCu, Pd, W, Ti, Cr, Si, Al, Rh, Ta, Ru, TaN, YBCO, indium tin oxide, InO 3 , ZnO, RuO 2 , and La 1-x Sr x CoO 3 . 
     
     
       21. The apparatus of claim 20, wherein the third electrically-conductive layer comprises at least one of Ir, Au, Ag, TiN, AlCu, Pd, W, Ti, Cr, Si, Al, Rh, Ta, Ru, TaN, YBCO, indium tin oxide, InO 3 , ZnO, RuO 2 , and La 1-x Sr x CoO 3 . 
     
     
       22. The apparatus of claim 17, wherein the substrate comprises silicon. 
     
     
       23. The apparatus of claim 17, wherein the substrate comprises at least one of Ge, SiO 2 , GeAs, glass, quartz, or plastic. 
     
     
       24. The apparatus of claim 17, wherein the deposited amorphous material is doped with a Group V donor material. 
     
     
       25. The apparatus of claim 17, wherein the bottom electrode, the deposited amorphous material, and the top electrode are components of a metal/semiconductor/metal (MSM) diode, wherein the apparatus further comprises a memory resistor bottom electrode and a memory resistor material overlying the memory resistor bottom electrode, and wherein the MSM diode overlies the memory resistor material.