Method for determining the exhaustion level of semiconductor memory

Abstract

The memory system includes a NAND type flash memory 1 in which data can be electrically written/erased, a nonvolatile memory 2 which counts the number of erase operations of the NAND type flash memory 1 and retains the number of erase operations and a maximum number of erase operations, and a controller 3 which has a connection interface 31 to be given a self-diagnosis command from a computer 4, and retrieves the number of erase operations and the maximum number of erase operations from the nonvolatile memory 2 based on the self-diagnosis command and outputs the number of erase operations and the maximum number of erase operations to the computer 4 through the connection interface 31.

The invention claimed is: 
     
       1. A memory system comprising:
 a first memory in which data can be electrically written/erased;   a nonvolatile second memory which is random access memory and counts the number of erase operations of the first memory and retains the number of erase operations and a maximum number of erase operations of the first memory;   a controller which is connected to be given a self-diagnosis command from an outside through a connection interface, and which retrieves the number of erase operations and the maximum number of erase operations from the second memory based on the self-diagnosis command and outputs the number of erase operations and the maximum number of erase operations to the outside through the connection interface; and   a time counter which measures a total time required for writing data in the first memory,   wherein the nonvolatile second memory retains the number of erase operations, the maximum number of erase operations, and the time required for writing the data,   the controller outputs the number of erase operations, the maximum number of erase operations, and the time required for writing the data based on the self-diagnosis command, and   the time counter measures total time required for a store operation of the first memory and a verify operation for verifying whether data has been written, when the store operation and the verify operation are repeated.   
     
     
       2. The memory system according to  claim 1 , wherein the second memory retains a threshold of an exhaustion level obtained by division of the number of erase operations by the maximum number of erase operations, and the controller outputs the number of erase operations, maximum number of erase operations, and the threshold based on the self-diagnosis command. 
     
     
       3. The memory system according to  claim 1 , wherein the second memory retains data guarantee period information of the first memory corresponding to the number of erase operations, and the controller outputs the number of erase operations, the maximum number of erase operations, and the data guarantee period information based on the self-diagnosis command. 
     
     
       4. The memory system according to  claim 1 , further comprising:
 a timer which measures an energization time,   wherein the second memory retains the number of erase operations, the maximum number of erase operations, and a present energization time, and the controller outputs the number of erase operations, the maximum number of erase operations, and the present energization time based on the self-diagnosis command, the present energization time representing a total time at which the first memory has been energized.   
     
     
       5. The memory system according to  claim 4 , wherein the second memory further retains a maximum energization time of the first memory, and the controller outputs the number of erase operations, the maximum number of erase operations, the present energization time, and the maximum energization time based on the self-diagnosis command. 
     
     
       6. The memory system according to  claim 1 , wherein the second memory retains the number of error bits in a memory block having a maximum number of error bits among a plurality of memory blocks included in the first memory, and the controller outputs the number of erase operations, the maximum number of erase operations, and the number of error bits based on the self-diagnosis command. 
     
     
       7. The memory system according to  claim 1 , wherein the second memory retains the number of error bits in at least one of a plurality of memory blocks included in the first memory, and the controller outputs the number of erase operations, the maximum number of erase operations, and the number of error bits based on the self-diagnosis command. 
     
     
       8. The memory system according to  claim 7 , wherein the second memory retains a threshold of the number of error bits, and the controller outputs the number of erase operations, the maximum number of erase operations, the number of error bits, and the threshold based on the self-diagnosis command. 
     
     
       9. The memory system according to  claim 1 , wherein the second memory retains a threshold of the time required for writing the data, and the controller outputs the number of erase operations, the maximum number of erase operations, the time required for writing the data, and the threshold based on the self-diagnosis command. 
     
     
       10. A memory system comprising:
 a first memory in which data can be electrically written/erased;   a nonvolatile second memory which is random access memory and counts the number of erase operations of the first memory and retains the number of erase operations and a maximum number of erase operations of the first memory;   a controller which is connected to be given a self-diagnosis command from an outside through a connection interface, and which retrieves the number of erase operations and the maximum number of erase operations from the second memory based on the self-diagnosis command and outputs the number of erase operations and the maximum number of erase operations to the outside through the connection interface; and   a time counter which measures a total time required for writing data in the first memory,   wherein the second memory retains the number of erase operations, the maximum number of erase operations, and the time required for writing the data,   the controller outputs the number of erase operations, the maximum number of erase operations, and the time required for writing the data based on the self-diagnosis command, and   the time counter measures total time required for a erase operation of the first memory and a verify operation for verifying whether erase data has been written, when the erase operation and the verify operation are repeated.   
     
     
       11. The memory system according to  claim 10 , wherein the second memory retains a threshold of an exhaustion level obtained by division of the number of erase operations by the maximum number of erase operations, and the controller outputs the number of erase operations, maximum number of erase operations, and the threshold based on the self-diagnosis command. 
     
     
       12. The memory system according to  claim 10 , wherein the second memory retains data guarantee period information of the first memory corresponding to the number of erase operations, and the controller outputs the number of erase operations, the maximum number of erase operations, and the data guarantee period information based on the self-diagnosis command. 
     
     
       13. The memory system according to  claim 10 , further comprising:
 a timer which measures an energization time,   wherein the second memory retains the number of erase operations, the maximum number of erase operations, and a present energization time, and the controller outputs the number of erase operations, the maximum number of erase operations and the present energization time based on the self-diagnosis command, the present energization time representing a total time at which the first memory has been energized.   
     
     
       14. The memory system according to  claim 13 , wherein the second memory further retains a maximum energization time of the first memory, and the controller outputs the number of erase operations, the maximum number of erase operations, the present energization time, and the maximum energization time based on the self-diagnosis command. 
     
     
       15. The memory system according to  claim 10 , wherein the second memory retains the number of error bits in a memory block having a maximum number of error bits among a plurality of memory blocks included in the first memory, and the controller outputs the number of erase operations, the maximum number of erase operations, and the number of error bits based on the self-diagnosis command. 
     
     
       16. The memory system according to  claim 10 , wherein the second memory retains the number of error bits in at least one of a plurality of memory blocks included in the first memory, and the controller outputs the number of erase operations, the maximum number of erase operations, and the number of error bits based on the self-diagnosis command. 
     
     
       17. The memory system according to  claim 16 , wherein the second memory retains a threshold of the number of error bits, and the controller outputs the number of erase operations, the maximum number of erase operations, the number of error bits, and the threshold based on the self-diagnosis command. 
     
     
       18. The memory system according to  claim 10 , wherein the second memory retains a threshold of the time required for writing the data, and the controller outputs the number of erase operations, the maximum number of erase operations, the time required for writing the data, and the threshold based on the self-diagnosis command. 
     
     
       19. A method of operating a host device capable of communicating with a memory device including 1) a semiconductor memory comprising a plurality of blocks, the semiconductor memory configured to perform an erase operation by units of the blocks, the semiconductor memory being a nonvolatile semiconductor memory, 2) a random access memory, and 3) a controller configured to control transferring data to the semiconductor memory, the controller electrically connected to the host device, the controller configured to count a number of the erase operations of each of the blocks and measure a total time required for writing data in the semiconductor memory, the random access memory retaining the number of erase operations, the memory device not being included in the host device,
 the method comprising:
 performing a process, the process comprising:
 issuing a self-diagnosis command to the memory device; 
 receiving from the memory device a response to the self-diagnosis command, the response comprising a total of the number of the erase operations, the measured total time required for writing the data, and a maximum number of the erase operations; and 
 determining whether an exhaustion level of the memory device is greater than a first predetermined threshold and whether the measured total time required for writing the data is greater than a second predetermined threshold, wherein: 
 
 the performing the process is repeated a plurality of times before the exhaustion level becomes greater than the first predetermined threshold; and 
 the exhaustion level is calculated from the total of the number of the erase operations. 
   
     
     
       20. The method according to claim 19, the method further comprising causing a display to show the exhaustion level. 
     
     
       21. The method according to claim 20, wherein the exhaustion level is represented in a percentage. 
     
     
       22. The method according to claim 20, wherein, in the causing the display to show the exhaustion level, the exhaustion level is represented by a circle graph. 
     
     
       23. The method according to claim 20, wherein, in the causing the display to show the exhaustion level, the exhaustion level is represented by a line graph. 
     
     
       24. A method of operating a host device capable of communicating with a memory device including 1) a semiconductor memory comprising a plurality of blocks, the semiconductor memory configured to perform an erase operation by units of the blocks, the semiconductor memory being a nonvolatile semiconductor memory, and 2) a random access memory, and 3) a controller configured to control transferring data to the semiconductor memory, the controller electrically connected to the host device, the controller configured to count a number of the erase operations of each of the blocks and measure a total time required for writing data in the semiconductor memory, the random access memory retaining the number of erase operations, the memory device not being included in the host device,
 the method comprising:
 performing a process, the process comprising:
 issuing a self-diagnosis command to the memory device; 
 receiving from the memory device a response to the self-diagnosis command, the response comprising a total of the number of the erase operations, the measured total time required for writing the data, and a maximum number of the erase operations; and 
 determining whether an exhaustion level of the memory device is greater than a predetermined threshold, wherein: 
 
 the performing the process is repeated a plurality of times before the exhaustion level becomes greater than the predetermined threshold, 
   the process further comprises calculating the exhaustion level based on the total of the number of the erase operations and the measured total time.   
     
     
       25. The method according to claim 24, the method further comprising causing a display to show the exhaustion level. 
     
     
       26. The method according to claim 25, wherein the exhaustion level is represented in a percentage. 
     
     
       27. The method according to claim 25, wherein, in the causing the display to show the exhaustion level, the exhaustion level is represented by a circle graph. 
     
     
       28. The method according to claim 25, wherein, in the causing the display to show the exhaustion level, the exhaustion level is represented by a line graph. 
     
     
       29. A method of operating a host device capable of communicating with a memory device including 1) a semiconductor memory comprising a plurality of blocks, the semiconductor memory configured to perform an erase operation by units of the blocks, the semiconductor memory being a nonvolatile semiconductor memory, the semiconductor memory configured to store data, and 2) a random access memory, and 3) a controller configured to control transferring data to the semiconductor memory, the controller electrically connected to the host device, the controller configured to count a number of the erase operations of each of the blocks and measure a total time required for writing data in the semiconductor memory, the random access memory retaining the number of erase operations, the memory device not being included in the host device,
 the method comprising:
 performing a process, the process comprising:
 issuing a self-diagnosis command to the memory device; 
 receiving from the memory device a response to the self-diagnosis command, the response comprising a total of the number of the erase operations, the measured total time required for writing the data, and a maximum number of the erase operations; and 
 
 determining based on the total of the number of the erase operations, the maximum number of the erase operations, and the measured total time whether backup of the data is needed. 
   
     
     
       30. The method according to claim 29, the method further comprising causing a display to show the determination whether backup of the data is needed. 
     
     
       31. The method according to claim 30, wherein the determination whether backup of the data is needed is represented in a percentage. 
     
     
       32. The method according to claim 30, wherein, in the causing the display to show the determination whether backup of the data is needed, the determination whether backup of the data is needed is represented by a circle graph. 
     
     
       33. The method according to claim 30, wherein, in the causing the display to show the determination whether backup of the data is needed, the determination whether backup of the data is needed is represented by a line graph. 
     
     
       34. A method of operating a host device configured to communicate with a memory device including 1) a semiconductor memory comprising a plurality of blocks, the semiconductor memory configured to perform an erase operation by units of the blocks, the semiconductor memory being a nonvolatile semiconductor memory, 2) a random access memory and 3) a controller configured to control transferring data to the semiconductor memory, the controller electrically connected to the host device, the controller configured to count a number of the erase operations of each of the blocks and measure a total time required for writing data in the semiconductor memory, the random access memory retaining the number of erase operations, the memory device not being included in the host device,
 the method comprising:
 issuing a self-diagnosis command to the memory device; 
 receiving from the memory device a response to the self-diagnosis command, the response comprising a total of the number of the erase operations, the measured total time required for writing the data, and a maximum number of the erase operations; 
 calculating an exhaustion level based on the total of the number of the erase operations; and 
 determining whether the exhaustion level is greater than a first predetermined threshold and whether the measured total time required for writing the data is greater than a second predetermined threshold. 
   
     
     
       35. The method according to claim 34, the method further comprising causing a display to show the exhaustion level. 
     
     
       36. The method according to claim 35, wherein the exhaustion level is represented in a percentage. 
     
     
       37. The method according to claim 35, wherein, in the causing the display to show the exhaustion level, the exhaustion level is represented by a circle graph. 
     
     
       38. The method according to claim 35, wherein, in the causing the display to show the exhaustion level, the exhaustion level is represented by a line graph.