USRE48450EActiveUtility

Semiconductor device and method for manufacturing the same

58
Assignee: RENESAS ELECTRONICS CORPPriority: Sep 15, 2009Filed: Mar 13, 2018Granted: Feb 23, 2021
Est. expirySep 15, 2029(~3.2 yrs left)· nominal 20-yr term from priority
H10W 10/021H10W 10/20H10D 62/378H10D 84/856H10D 84/0109H10D 84/0181H10D 84/0167H10D 84/0179H10D 84/017H10D 84/0188H10D 84/0191H10D 64/663H10D 64/62H10D 62/371H10D 62/157H10D 62/116H10D 62/83H10D 30/603H10D 30/0285H10D 30/65H10D 84/038H10D 62/115H10B 41/30H10B 41/40H01L 29/1087H01L 29/7816H01L 27/11526H01L 21/823892H01L 21/823814H01L 29/0878H01L 21/82385H01L 29/0649H01L 27/11521H01L 21/764H01L 29/7835H01L 27/0922H01L 29/66689H01L 29/456H01L 21/823857H01L 29/1083H01L 29/0653H01L 21/823878H01L 29/4933H01L 21/823807
58
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References
11
Claims

Abstract

A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising:
 a semiconductor substrate having a trench in a main surface thereof;   a device being formed over the main surface of the semiconductor substrate; and   an insulating film being formed over the device and in the trench so as to cover the device and form an air-gap space in the trench,   wherein a side surface of the trench on a same level of a bottom of the air-gap space directly contacts the semiconductor substrate.   
     
     
       2. A semiconductor device according to  claim 1  wherein,
 the device has a conductive portion, and 
 the insulating film has a hole which reaches the conductive portion. 
 
     
     
       3. A semiconductor device according to  claim 1 , wherein the trench is formed so as to surround the device when seen in a plan view. 
     
     
       4. A method of manufacturing a semiconductor device including 1) a first semiconductor layer having a first conductivity type, 2) a second semiconductor layer formed on the first semiconductor layer and having a second conductivity type different from the first conductivity type, 3) a third semiconductor layer formed on the second semiconductor layer and having the first conductivity type, and 4) a MOS transistor having a gate electrode over the third semiconductor layer, and source and drain regions in the third semiconductor layer,
 the method comprising the steps of:
 (a) forming a first trench extending from the third semiconductor layer to reach inside the first semiconductor layer, and surrounding the MOS transistor in plan view; 
 (b) forming a first insulating film covering the gate electrode and filling the first trench, while leaving an air-gap in the first trench; and 
 (c), before the step (a), forming a second trench in the third semiconductor layer, 
   wherein the first trench penetrates through the second semiconductor layer,   wherein the first trench is formed in the second trench, and   wherein the air-gap extends from the third semiconductor layer through the second semiconductor layer to the first semiconductor layer.   
     
     
       5. The method of manufacturing a semiconductor device according to claim 4, wherein a bottom of the air-gap is located in the first semiconductor layer. 
     
     
       6. The method of manufacturing a semiconductor device according to claim 4,
 wherein the second trench is filled with a second insulating film, and   wherein an isolation region including the second trench contacts the source or drain region in the third semiconductor layer.   
     
     
       7. The method of manufacturing a semiconductor device according to claim 6, wherein the first trench surrounds the MOS transistor and the isolation region in plan view. 
     
     
       8. The method of manufacturing a semiconductor device according to claim 6, wherein the step (a) further includes:
 (a-1) forming a mask film over the MOS transistor and the third semiconductor layer; and   (a-2) performing anisotropic etching to form the first trench in the first to third semiconductor layers by using the mask film.   
     
     
       9. The method of manufacturing a semiconductor device according to claim 8, wherein the mask film comprises silicon oxide (SiO). 
     
     
       10. The method of manufacturing a semiconductor device according claim 4, after the step (b), further comprising the steps of:
 (d) forming a conductive layer in the first insulating film to reach the source or drain region; and   (e) forming an interconnecting layer, on the first insulating film, connected to the conductive layer.   
     
     
       11. The semiconductor device according to claim 4, wherein the first semiconductor layer includes a semiconductor substrate and an epitaxial region formed on the semiconductor substrate.

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