USRE49195EActiveUtility

Silicon carbide semiconductor device

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Assignee: PANASONIC IP MAN CO LTDPriority: May 23, 2014Filed: Mar 6, 2019Granted: Aug 30, 2022
Est. expiryMay 23, 2034(~7.9 yrs left)· nominal 20-yr term from priority
H10W 72/926H10D 62/128H10D 62/106H10D 12/441H10D 8/411H10D 84/811H10D 84/143H10D 84/00H10D 64/519H10D 64/20H10D 62/8325H10D 62/107H10D 62/81H10D 62/10H10D 30/665H10D 30/60H10D 12/031H10D 8/50H10D 8/00H10D 84/01H01L 29/0623H01L 29/12H01L 29/7811H01L 29/7395H01L 27/0605H01L 2224/0603H01L 29/0619H01L 29/06H01L 27/0727H01L 29/861H01L 29/4238H01L 29/41H01L 29/66068H01L 27/04H01L 29/7804H01L 29/8611H01L 29/78H01L 29/868H01L 29/1608
55
PatentIndex Score
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Cited by
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References
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Claims

Abstract

A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A silicon carbide semiconductor device comprising, a laminated structure that includes a first conductive type: 
 a semiconductor substrate,of first conductive type;  
 a first conductive type first silicon carbide semiconductor layer of the first conductive type located on a main surface of the semiconductor substrate,; and 
 a first ohmic electrode located on a back surface of the semiconductor substrate, wherein:  
 the laminated structure including silicon carbide semiconductor device includes a transistor region, a termination region, and a diode region, each region including a part of the semiconductor substrate, a part of the first silicon carbide semiconductor layer, and a part of the first ohmic electrode, wherein 
 the termination region surrounds the transistor region, and the diode region is located between the transistor region and the termination region when viewed in a direction perpendicular to the main surface of the semiconductor substrate, 
 whereinthe silicon carbide semiconductor device comprises, in the transistor region includes, a plurality of unit cell regions, 
 the silicon carbide semiconductor device comprises: 
 in each of the plurality of unit cell regions, includes:  
 a second conductive type first well region located in a part of the first silicon carbide semiconductor layer of second conductive type; 
 a first conductive type source region located in the first well region of the first conductive type; 
 a second silicon carbide semiconductor layer formed on a part of the first silicon carbide semiconductor layer so as to be in contact with at least a part of the first well region and a part of the source region, the second silicon carbide semiconductor layer including a first conductive type layer having a lower higher impurity concentration than an impurity concentration of at least the first silicon carbide semiconductor layer; 
 a gate insulating film on the second silicon carbide semiconductor layer; and  
 a gate electrode located on the gate insulating film; 
 a second ohmic electrode electrically connected to the source region; and,  
 an upper electrode electrically connected to the second ohmic electrode, 
 the silicon carbide semiconductor device comprises, in the diode region: 
 a second conductive type second well region located in a part of the first silicon carbide semiconductor layer of the second conductive type; 
 a contact region located in the second well region and having a higher impurity concentration than an impurity concentration of the second well region; 
 athe second silicon carbide semiconductor layer formed on a part of the first silicon carbide semiconductor layer so as to be in contact with at least a part of the contact region; 
 an insulating film formed on the second silicon carbide semiconductor layer and having a thickness substantially same as a thickness of the gate insulating film; 
 a gate electrode formed on at least a part of the insulating film; 
 a gate line located on the contact region and electrically connected to the gate electrode; 
 a gate pad located on the contact region and electrically connected to the gate line for establishing external connection; and  
 an inner third ohmic electrodeat least two third ohmic electrodes, one of the at least two third ohmic electrodes being electrically connected to at least a region located between the gate line and the transistor region in the contact region, and an outer third ohmic electrode, and another one of the at least two third ohmic electrodes being electrically connected to at least a region located between the gate line and the termination region in the contact region; and,  
 a source line electrically connected to the inner third ohmic electrode and the upper electrode on each of the unit cell regions, and 
 the silicon carbide semiconductor device comprises, in the termination region, 
 a second conductive typean impurity region located in a part of the first silicon carbide semiconductor layerof the second conductive type, 
 wherein the gate electrode is located between the inner third ohmic electrode and the outer third ohmic electrode when viewed in a direction perpendicular to the main surface of the semiconductor substrate at least two third ohmic electrodes, 
 the silicon carbide semiconductor device comprises a plurality of third ohmic electrodes between the gate line in the diode region and the transistor region, the at least two third ohmic electrodes being included in the plurality of third ohmic electrodes, 
 each of the plurality of third ohmic electrodes has a rectangular or a circular shape as viewed in a direction perpendicular to the main surface of the semiconductor substrate, and 
 a third ohmic electrode closest to a corner of the second well region, out of the plurality of third ohmic electrodes, has an area larger than an area of a third ohmic electrode, out of the plurality of third ohmic electrodes, adjacent to the third ohmic electrode closest to the corner of the second well region. 
 
     
     
       2. The silicon carbide semiconductor device according to  claim 1 , further comprising, between the gate line in the diode region and the termination region, at least one unit cell having a structure same as a structure of each of the plurality of unit cell regions in the transistor region. 
     
     
       3. The silicon carbide semiconductor device according to  claim 1  or  2  A silicon carbide semiconductor device comprising:
 a semiconductor substrate of first conductive type, 
 a first silicon carbide semiconductor layer of first conductive type located on a main surface of the semiconductor substrate, and 
 a first ohmic electrode located on a back surface of the semiconductor substrate, wherein 
 the silicon carbide semiconductor device includes a transistor region, a termination region, and a diode region, 
 the termination region surrounds the transistor region, and the diode region is located between the transistor region and the termination region, 
 the silicon carbide semiconductor device comprises, in the transistor region, a plurality of unit cell regions, each of the plurality of unit cell regions includes:
 a first well region of second conductive type; 
 a source region of first conductive type; 
 a second silicon carbide semiconductor layer including a first conductive type layer having a higher impurity concentration than an impurity concentration of the first silicon carbide semiconductor layer; 
 a gate insulating film; and 
 a second ohmic electrode electrically connected to the source region, 
 
 the silicon carbide semiconductor device comprises, in the diode region:
 a second well region of second conductive type; 
 a contact region having a higher impurity concentration than an impurity concentration of the second well region; 
 the second silicon carbide semiconductor layer; 
 an insulating film; 
 a gate electrode; 
 a gate line electrically connected to the gate electrode; 
 a gate pad electrically connected to the gate line; and 
 at least two third ohmic electrodes, one of the at least two third ohmic electrodes being electrically connected to a region located between the gate line and the transistor region, another one of the at least two third ohmic electrodes being electrically connected to a region located between the gate line and the termination region, 
 
 the silicon carbide semiconductor device comprises, in the termination region, an impurity region of second conductive type, 
 the gate electrode is located between the at least two third ohmic electrodes, wherein 
 the silicon carbide semiconductor device includes a laminated structure has having a shape of a substantially rectangle as viewed in the a direction perpendicular to the main surface of the semiconductor substrate, and 
 a breakdown voltage of the termination region on two corners closer to the gate pad out of four corners of the rectangle is higher than a breakdown voltage of the termination region on at least one of the other two corners. 
 
     
     
       4. The silicon carbide semiconductor device according to  claim 3 , wherein: 
 the impurity region constitutes a field limiting ring (FLR) structure in the termination region, and 
 a radius of the impurity region on the two corners closer to the gate pad is larger than a radius of the impurity region on at least one of the other two corners. 
 
     
     
       5. The silicon carbide semiconductor device according to  claim 3 , wherein: 
 the impurity region constitutes a field limiting ring (FLR) structure in the termination region, and 
 a width of the impurity region on the two corners closer to the gate pad is larger than a width of the impurity region on at least one of the other two corners. 
 
     
     
       6. The silicon carbide semiconductor device according to  claim 1 , comprising a plurality of the third ohmic electrodes between the gate line in the diode region and the transistor region,
 wherein the plurality of the third ohmic electrodes has a rectangular or a circular shape as viewed in the direction, and   a third ohmic electrode closest to a corner of the second well region, out of the plurality of the third ohmic electrodes, has an area larger than an area of a third ohmic electrode adjacent to the third ohmic electrode closest to the corner of the second well region.   
     
     
       7. The A silicon carbide semiconductor device comprising:
 a semiconductor substrate of first conductive type, 
 a first silicon carbide semiconductor layer of first conductive type located on a main surface of the semiconductor substrate, and 
 a first ohmic electrode located on a back surface of the semiconductor substrate, wherein 
 the silicon carbide semiconductor device includes a transistor region, a termination region, and a diode region, 
 the termination region surrounds the transistor region, and the diode region is located between the transistor region and the termination region, 
 the silicon carbide semiconductor device comprises, in the transistor region, a plurality of unit cell regions, each of the plurality of unit cell regions includes:
 a first well region of second conductive type; 
 a source region of first conductive type; 
 a second silicon carbide semiconductor layer including a first conductive type layer having a higher impurity concentration than an impurity concentration of the first silicon carbide semiconductor layer; 
 a gate insulating film; and 
 a second ohmic electrode electrically connected to the source region, 
 
 the silicon carbide semiconductor device comprises, in the diode region:
 a second well region of second conductive type; 
 a contact region having a higher impurity concentration than an impurity concentration of the second well region; 
 the second silicon carbide semiconductor layer; 
 an insulating film; 
 a gate electrode; 
 a gate line electrically connected to the gate electrode; 
 a gate pad electrically connected to the gate line; and 
 at least two third ohmic electrodes, one of the at least two third ohmic electrodes being electrically connected to a region located between the gate line and the transistor region, another one of the at least two third ohmic electrodes being electrically connected to a region located between the gate line and the termination region, 
 
 the silicon carbide semiconductor device comprises, in the termination region, an impurity region of second conductive type, 
 the gate electrode is located between the at least two third ohmic electrodes, 
 the silicon carbide semiconductor device according to  claim 1 , comprising further comprises a plurality of the third ohmic electrodes between the gate line in the diode region and the transistor region, the at least two third ohmic electrodes being included in the plurality of third ohmic electrodes,  
 whereineach of the plurality of the third ohmic electrodes has a stripe shape as viewed in the a direction perpendicular to the main surface of the semiconductor substrate, and 
 a width of the stripe is maximized at a corner of the second well region. 
 
     
     
       8. The silicon carbide semiconductor device according to  claim 1 , wherein: 
 the second well region is constituted by a plurality of second well regions divided into multiple regions in the diode region, and 
 a space between the divided multiple plurality of second well regions is equal to or less than a space between the divided multiple the first well region and the plurality of second well regions and the first well region. 
 
     
     
       9. The silicon carbide semiconductor device according to claim 1, wherein the insulating film has a thickness substantially same as a thickness of the gate insulating film.

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