Storage medium and semiconductor package

Abstract

A semiconductor package includes a semiconductor chip formed with a non-volatile semiconductor memory, a resin encapsulation that encapsulates the semiconductor chip, electrodes in a lattice (solder balls) formed and arrayed in a lattice on a bottom surface of the resin encapsulation. The solder balls include a signal electrode formed within the central region of the array and a dummy electrode formed outside the signal electrode.

What is claimed is: 
     
       1. A storage medium comprising:
 a semiconductor package having a semiconductor chip, a resin encapsulation that encapsulates the semiconductor chip, and a plurality of electrodes arrayed on a bottom surface of the resin encapsulation; and   a substrate including a conductor that joins the electrodes, and having the semiconductor package mounted thereon, wherein   the electrodes include a plurality of signal electrodes formed within a central region of the array, and a plurality of dummy electrodes formed in an outer region of the signal electrodes,   each of the signal electrodes includes a first pad as a projection-electrode forming pad for a power supply line or a signal line, and a first projection electrode formed on the first pad, and   each of the dummy electrodes includes a second pad as a projection-electrode forming pad for a dummy electrode and a second projection electrode formed on the second pad.   
     
     
       2. The storage medium according to  claim 1 , wherein only the dummy electrodes among the signal electrodes and the dummy electrodes are disposed in the outer region. 
     
     
       3. The storage medium according to  claim 1 , wherein the dummy electrode further includes a third pad for burying a vacant region, and no projection electrode is formed on the third pad. 
     
     
       4. The storage medium according to  claim 1 , wherein the central region in which the signal electrodes are formed has a region of a width about ⅓ to ½ of entire width of the array. 
     
     
       5. The storage medium according to  claim 1 , wherein a proportion in number of the signal electrodes to the electrodes is less than 30%. 
     
     
       6. The storage medium according to  claim 1 , wherein a proportion in number of the signal electrodes to the electrodes is less than 20%. 
     
     
       7. The storage medium according to  claim 1 , wherein the signal electrodes are placed to exhibit line symmetry about a center line of the array formed by the electrodes or point symmetry about a center of the array. 
     
     
       8. The storage medium according to  claim 1 , wherein the dummy electrodes are formed to enclose entire circumference of the signal electrodes. 
     
     
       9. The storage medium according to  claim 1 , wherein semiconductor chips are stacked and encapsulated in the resin encapsulation. 
     
     
       10. The storage medium according to  claim 1 , wherein the semiconductor chip has a NAND flash memory incorporated therein. 
     
     
       11. A semiconductor package comprising:
 a semiconductor chip;   a wiring substrate having the semiconductor chip mounted on a first surface; and   a plurality of projection electrodes formed on a second surface opposite to the first surface of the wiring substrate, wherein   a bonding pad, to which a bonding wire extending from the semiconductor chip is connected, is formed at an edge of the first surface on the wiring substrate, and a plurality of projection-electrode forming pads for forming the projection electrodes are arrayed and formed in a lattice on the second surface, and   the projection-electrode forming pads include first projection-electrode forming pads as projection-electrode forming pads for a power supply line formed within a central region of the array and second projection-electrode forming pads as projection-electrode forming pads for a dummy electrode formed in an outer region of the central region,   the projection electrodes include first projection electrodes formed on the first projection-electrode forming pads and second projection electrodes formed on the second projection-electrode forming pads,   two or more second projection-electrode forming pads among the second projection-electrode forming pads are connected to one another by a connection pattern formed on the second surface, and   the first projection-electrode forming pads are connected to the bonding pad through the plurality of second projection-electrode forming pads connected by the connection pattern, and a through hole formed in the wiring substrate.   
     
     
       12. The semiconductor package according to  claim 11 , wherein in the second projection-electrode forming pads connected by the connection pattern, the second projection-electrode forming pads adjacent to each other are connected. 
     
     
       13. The semiconductor package according to  claim 11 , wherein only the second projection-electrode forming pads are disposed in the outer region. 
     
     
       14. The semiconductor package according to  claim 11 , wherein the wiring substrate forms a rectangle, and the bonding pad is arranged at an edge on a short side of the wiring substrate. 
     
     
       15. The semiconductor package according to  claim 11 , wherein the semiconductor chips are stacked and mounted on the wiring substrate. 
     
     
       16. A storage medium comprising:
 a substrate; and   a semiconductor package including:
 a semiconductor chip; and 
 an array of electrodes arrayed on a rectangular bottom side of the package, the electrodes including signal electrodes for a power supply line or a signal line and dummy electrodes, wherein 
   the semiconductor package is mounted on the substrate,   the signal electrodes include first signal electrodes arranged along a short-side direction of the bottom side and formed in at least two lines,   the dummy electrodes include first dummy electrodes, second dummy electrodes, and a plurality of third dummy electrodes,   the plurality of third dummy electrodes are arranged in four corners of the array, a first two of the four corners being located on one side in a long-side direction of the bottom side and a second two of the corners being located on another side in the long-side direction,   the first dummy electrodes are arranged along the short-side direction in a region between the first signal electrodes and third dummy electrodes located on the one side among the plurality of third dummy electrodes and are formed in at least two lines,   the second dummy electrodes are arranged along the short-side direction in a region between the first signal electrodes and third dummy electrodes located on the other side among the plurality of third dummy electrodes and are formed in a line, and   no first or second dummy electrode is arranged directly between one of the third dummy electrodes arranged in each the first two corners located on the one side in the long-side direction of the bottom side.    
     
     
       17. The storage medium according to claim 16, wherein
 each of the at least two lines of the first signal electrodes includes at least four signal electrodes,   each of the at least two lines of the first dummy electrodes includes at least four dummy electrodes, and   the line of the second dummy electrodes includes at least two dummy electrodes.    
     
     
       18. The storage medium according to claim 16, wherein third dummy electrodes arranged in each of the four corners among the plurality of third dummy electrodes are formed in at least one line along the short-side direction.  
     
     
       19. The storage medium according to claim 18, wherein each line of the third dummy electrodes includes at least two dummy electrodes.  
     
     
       20. The storage medium according to claim 16, wherein
 the signal electrodes further include second signal electrodes arranged along the short-side direction in a region between the line of the second dummy electrodes and the third dummy electrodes located on the other side, and   the second signal electrodes are formed in at least two lines.    
     
     
       21. The storage medium according to claim 20, wherein
 the dummy electrodes further include fourth dummy electrodes arranged along the long-side direction in a region outside of the second signal electrodes in the long-side direction, and   the fourth dummy electrodes are formed in at least two lines.    
     
     
       22. The storage medium according to claim 21, wherein
 each of the at least two lines of the second signal electrodes includes at least four signal electrodes, and   each of the at least two lines of the fourth dummy electrodes includes at least two dummy electrodes.    
     
     
       23. The storage medium according to claim 16, wherein no first or second electrode is arranged directly between the third dummy electrodes arranged in the second two corners located on the other side in the long-side direction of the bottom side.  
     
     
       24. The storage medium according to claim 23, wherein no first or second electrode is arranged directly between the third dummy electrodes arranged in corners located on the short-side direction of the bottom side.  
     
     
       25. The storage medium according to claim 16, wherein, on each of the long and short sides of the array, the third dummy electrodes are arranged to be closer to a respective outer edge of the package compared to the first and second electrodes.  
     
     
       26. A storage medium comprising:
 a substrate; and   a semiconductor package including:
 a semiconductor chip; and 
 an array of electrodes arrayed on a rectangular bottom side of the package, the electrodes including signal electrodes for a power supply line or a signal line and dummy electrodes, wherein 
   the semiconductor package is mounted on the substrate,   the bottom side of the package includes first to third regions,   the first region includes four corners of the bottom side,   the second region includes four areas located between the four corners, two areas of the four areas being located along a long side of the bottom side, and two other areas of the four areas being located along a short side of the bottom side,   the third region includes an area other than the first and second regions,   neither the signal electrodes nor the dummy electrodes are arranged in the second region,   the signal electrodes include first signal electrodes arranged along a short-side direction of the bottom side,   the dummy electrodes include first dummy electrodes, second dummy electrodes, and a plurality of third dummy electrodes,   the plurality of third dummy electrodes are arranged in the four corners in the first region, a first two corners of the four corners being located on one side in a long-side direction of the bottom side and a second two corners of the four corners being located on another side in the long-side direction,   the first dummy electrodes are arranged along the short-side direction in a region between the first signal electrodes and third dummy electrodes located on the one side among the plurality of third dummy electrodes,   the second dummy electrodes are arranged along the short-side direction in a region between the first signal electrodes and third dummy electrodes located on the other side among the plurality of third dummy electrodes,   the first signal electrodes and the first and second dummy electrodes are arranged in the third region, and   no electrode is arranged between one-end electrode of the first signal electrodes arranged along the short-side direction from the one-end electrode along a line extending in the short-side direction to an outer edge of the package of the bottom side.    
     
     
       27. The storage medium according to claim 26, wherein the third dummy electrodes arranged in each of the four corners among the plurality of third dummy electrodes are formed in at least one line along the short-side direction.  
     
     
       28. The storage medium according to claim 27, wherein one or more third dummy electrodes among the third dummy electrodes are arranged on a single line extending in the long-side direction from both sides through each of two areas located along the long side of the bottom side among the four areas of the second region.  
     
     
       29. The storage medium according to claim 28, wherein two or more third dummy electrodes among the third dummy electrodes are arranged on two lines extending in the short-side direction from both sides through each of the two other areas located along the short side of the bottom side among the four areas of the second region.  
     
     
       30. The storage medium according to claim 27, wherein two or more third dummy electrodes among the third dummy electrodes are arranged on two lines extending in the short-side direction from both sides through each of the two other areas located along the short side of the bottom side among the four areas of the second region.  
     
     
       31. The storage medium according to claim 26, wherein
 the signal electrodes further include second signal electrodes arranged along the short-side direction in a region opposite to the first signal electrodes in the long-side direction while sandwiching the second dummy electrodes therebetween.    
     
     
       32. The storage medium according to claim 31, wherein the second signal electrodes are arranged in the third region.  
     
     
       33. The storage medium according to claim 31, wherein
 the dummy electrodes further include fourth dummy electrodes arranged along the long-side direction in a region outside of the second signal electrodes in the long-side direction.    
     
     
       34. The storage medium according to claim 33, wherein the fourth dummy electrodes are arranged in the third region.  
     
     
       35. A storage system comprising:
 a first substrate; and   a semiconductor package including:
 a semiconductor chip; 
 a second substrate, the semiconductor chip being mounted on the second substrate; and 
 an array of electrodes arrayed on a rectangular bottom side of the second substrate, the electrodes including signal electrodes for a power supply line or a signal line and dummy electrodes, wherein 
   the semiconductor package is mounted on the first substrate,   the signal electrodes include first signal electrodes arranged along a short-side direction of the bottom-side and formed in at least two lines,   the dummy electrodes include first dummy electrodes, second dummy electrodes, and a plurality of third dummy electrodes,   the plurality of third dummy electrodes are arranged in four corners of the array, a first two of the four corners being located on one side in a long-side direction of the bottom side and a second two of the corners being located on another side in the long-side direction,   the first dummy electrodes are arranged along the short-side direction in a region between the first signal electrodes and third dummy electrodes located on the one side among the plurality of third dummy electrodes and are formed in at least two lines,   the second dummy electrodes are arranged along the short-side direction in a region between the first signal electrodes and third dummy electrodes located on the other side among the plurality of third dummy electrodes and are formed in a line, and   no first or second dummy electrode is arranged directly between one of the third dummy electrodes arranged in each the first two corners located on the one side in the long-side direction of the bottom side.    
     
     
       36. A storage system comprising:
 a first substrate; and   a semiconductor package including:
 a semiconductor chip; 
 a second substrate, the semiconductor chip being mounted on the second substrate; and 
 an array of electrodes arrayed on a bottom side of the second substrate, the electrodes including signal electrodes for a power supply line or a signal line and dummy electrodes, wherein 
   the semiconductor package is mounted on the first substrate,   the bottom side of the package includes first to third regions,   the first region includes four corners of the bottom side,   the second region includes four areas located between the four corners, two areas of the four areas being located along a long side of the bottom side, and two other areas of the four areas being located along a short side of the bottom side,   the third region includes an area other than the first and second regions,   neither the signal electrodes nor the dummy electrodes are arranged in the second region,   the signal electrodes include first signal electrodes arranged along a short-side direction of the bottom side,   the dummy electrodes include first dummy electrodes, second dummy electrodes, and a plurality of third dummy electrodes,   the plurality of third dummy electrodes are arranged in the four corners in the first region, a first two corners of the four corners being located on one side in a long-side direction of the bottom side and a second two corners of the four corners being located on another side in the long-side direction,   the first dummy electrodes are arranged along the short-side direction in a region between the first signal electrodes and third dummy electrodes located on the one side among the plurality of third dummy electrodes,   the second dummy electrodes are arranged along the short-side direction in a region between the first signal electrodes and third dummy electrodes located on the other side among the plurality of third dummy electrodes,   the first signal electrodes and the first and second dummy electrodes are arranged in the third region, and   no electrode is arranged between one-end electrode of the first signal electrodes arranged along the short-side direction from the one-end electrode along a line extending in the short-side direction to an outer edge of the package of the bottom side.