Assignee
MOSYS INC
US·47 granted patents·11 pending applications·596 citations·filing 1996–2018
Top patents by PatentIndex Score
58 records- 0196US7447104B2Word line driver for DRAM embedded in a logic processMOSYS INC·Filed 2006·Granted Nov 4, 2008·40 cites·12 claims
- 0295US5784705AMethod and structure for performing pipeline burst accesses in a semiconductor memoryMOSYS INC·Filed 1996·Granted Jul 21, 1998·147 cites·28 claims
- 0394US8044724B2Low jitter large frequency tuning LC PLL for multi-speed clocking applicationsMOSYS INC·Filed 2009·Granted Oct 25, 2011·46 cites·10 claims
- 0494US7671401B2Non-volatile memory in CMOS logic processMOSYS INC·Filed 2005·Granted Mar 2, 2010·35 cites·20 claims
- 0594US7391647B2Non-volatile memory in CMOS logic process and method of operation thereofMOSYS INC·Filed 2006·Granted Jun 24, 2008·36 cites·22 claims
- 0693US7323379B2Fabrication process for increased capacitance in an embedded DRAM memoryMOSYS INC·Filed 2005·Granted Jan 29, 2008·18 cites·17 claims
- 0792US10114558B2Integrated main memory and coprocessor with low latencyMOSYS INC·Filed 2018·Granted Oct 30, 2018·7 cites·20 claims
- 0892US7533222B2Dual-port SRAM memory using single-port memory cellMOSYS INC·Filed 2006·Granted May 12, 2009·28 cites·21 claims
- 0989US7633810B2Non-volatile memory embedded in a conventional logic process and methods for operating sameMOSYS INC·Filed 2008·Granted Dec 15, 2009·14 cites·19 claims
- 1087US7392456B2Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memoryMOSYS INC·Filed 2004·Granted Jun 24, 2008·34 cites·9 claims
- 1186US9361196B2Memory device with background built-in self-repair using background built-in self-testingMOSYS INC·Filed 2014·Granted Jun 7, 2016·9 cites·35 claims
- 1283US9054578B2Hybrid driver including a turbo modeMOSYS INC·Filed 2013·Granted Jun 9, 2015·8 cites·22 claims
- 1383US7929359B2Embedded DRAM with bias-independent capacitanceMOSYS INC·Filed 2008·Granted Apr 19, 2011·8 cites·11 claims
- 1483US7353438B2Transparent error correcting memoryMOSYS INC·Filed 2003·Granted Apr 1, 2008·39 cites·22 claims
- 1581US7633811B2Non-volatile memory embedded in a conventional logic process and methods for operating sameMOSYS INC·Filed 2008·Granted Dec 15, 2009·8 cites·15 claims
- 1679US9148154B2Delay-locked loop with independent phase adjustment of delayed clock output pairsMOSYS INC·Filed 2014·Granted Sep 29, 2015·4 cites·23 claims
- 1779US8836381B2Pseudo-supply hybrid driverMOSYS INC·Filed 2013·Granted Sep 16, 2014·5 cites·27 claims
- 1878US10339043B1System and method to match vectors using mask and countMOSYS INC·Filed 2017·Granted Jul 2, 2019·2 cites·25 claims
- 1978US7634707B2Error detection/correction methodMOSYS INC·Filed 2004·Granted Dec 15, 2009·12 cites·4 claims
- 2077US9529569B2Method and apparatus for randomizerMOSYS INC·Filed 2015·Granted Dec 27, 2016·2 cites·20 claims
- 2177US7382658B2Non-volatile memory embedded in a conventional logic process and methods for operating sameMOSYS INC·Filed 2006·Granted Jun 3, 2008·7 cites·11 claims
- 2275US10320370B2Methods and circuits for adjusting parameters of a transceiverMOSYS INC·Filed 2012·Granted Jun 11, 2019·4 cites·22 claims
- 2375US6259651B1Method for generating a clock phase signal for controlling operation of a DRAM arrayMOSYS INC·Filed 2000·Granted Jul 10, 2001·17 cites·11 claims
- 2473US9354823B2Memory system including variable write burst and broadcast command schedulingMOSYS INC·Filed 2013·Granted May 31, 2016·3 cites·43 claims
- 2572US8988956B2Programmable memory built in self repair circuitMOSYS INC·Filed 2013·Granted Mar 24, 2015·4 cites·32 claims
- 2670US8368217B2Integrated circuit package with segregated Tx and Rx data channelsMOSYS INC·Filed 2012·Granted Feb 5, 2013·2 cites·20 claims
- 2770US7894270B2Data restoration method for a non-volatile memoryMOSYS INC·Filed 2009·Granted Feb 22, 2011·6 cites·11 claims
- 2869US7499307B2Scalable embedded DRAM arrayMOSYS INC·Filed 2006·Granted Mar 3, 2009·5 cites·22 claims
- 2968US7477546B2Non-volatile memory embedded in a conventional logic process and methods for operating sameMOSYS INC·Filed 2008·Granted Jan 13, 2009·4 cites·11 claims
- 3067US7684229B2Scalable embedded DRAM arrayMOSYS INC·Filed 2008·Granted Mar 23, 2010·4 cites·3 claims
- 3167US6147535AClock phase generator for controlling operation of a DRAM arrayMOSYS INC·Filed 2000·Granted Nov 14, 2000·12 cites·3 claims
- 3266US8361863B2Embedded DRAM with multiple gate oxide thicknessesMOSYS INC·Filed 2008·Granted Jan 29, 2013·3 cites·24 claims
- 3363US9030894B2Hierarchical multi-bank multi-port memory organizationMOSYS INC·Filed 2013·Granted May 12, 2015·2 cites·16 claims
- 3459US2019332274A1Processing engines coupled with read write modify memoryMOSYS INC·Filed 2018·Application pending·0 cites
- 3558US9553566B2Hybrid driver circuitMOSYS INC·Filed 2014·Granted Jan 24, 2017·1 cites·22 claims
- 3658US9496009B2Memory with bank-conflict-resolution (BCR) module including cacheMOSYS INC·Filed 2013·Granted Nov 15, 2016·2 cites·29 claims
- 3758US7919367B2Method to increase charge retention of non-volatile memory manufactured in a single-gate logic processMOSYS INC·Filed 2008·Granted Apr 5, 2011·1 cites·29 claims
- 3858US7522456B2Non-volatile memory embedded in a conventional logic process and methods for operating sameMOSYS INC·Filed 2008·Granted Apr 21, 2009·2 cites·6 claims
- 3958US2008209303A1Error Detection/Correction MethodMOSYS INC·Filed 2008·Application pending·0 cites
- 4057US8370725B2Communication interface and protocolMOSYS INC·Filed 2010·Granted Feb 5, 2013·1 cites·27 claims
- 4156US9971567B2Method and apparatus for randomizerMOSYS INC·Filed 2016·Granted May 15, 2018·0 cites·20 claims
- 4255US9921755B2Integrated main memory and coprocessor with low latencyMOSYS INC·Filed 2015·Granted Mar 20, 2018·0 cites·20 claims
- 4352US9667546B2Programmable partitionable counterMOSYS INC·Filed 2013·Granted May 30, 2017·0 cites·23 claims
- 4452US2008093645A1Fabrication Process For Increased Capacitance In An Embedded DRAM MemoryMOSYS INC·Filed 2007·Application pending·0 cites
- 4551US6078547AMethod and structure for controlling operation of a DRAM arrayMOSYS INC·Filed 1998·Granted Jun 20, 2000·9 cites·10 claims
- 4650US2013329553A1Traffic metering and shaping for network packetsMOSYS INC·Filed 2013·Application pending·0 cites
- 4749US7944281B2Constant reference cell current generator for non-volatile memoriesMOSYS INC·Filed 2008·Granted May 17, 2011·3 cites·21 claims
- 4849US7791975B2Scalable embedded DRAM arrayMOSYS INC·Filed 2008·Granted Sep 7, 2010·1 cites·18 claims
- 4944US10050773B1Bootstrapped autonegotiation clock from a referenceless clock chipMOSYS INC·Filed 2016·Granted Aug 14, 2018·0 cites·20 claims
- 5044US2010140680A1Double Polysilicon Process for Non-Volatile MemoryMOSYS INC·Filed 2008·Application pending·0 cites
Showing the top 50 of 58 patent records by PatentIndex Score.
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