Inventor

TSENG HORNG-HUEI

TW414 patents

⚠️ This page may combine multiple inventors who share the name “TSENG HORNG-HUEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSENG HORNG-HUEI

VANGUARD INT SEMICONDUCT CORP

Method of making pillar-type structure on semiconductor substrate

Method of making increased surface area, storage node electrode, with narrow spaces between polysilicon columns

Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer

Method of manufacturing buried metal lines having ultra fine features

Method of forming a MOSFET with a recessed-gate having a channel length beyond photolithography limit

Method of forming shallow trench isolation

Metallization method for forming interconnects in an integrated circuit

Method for making improved shallow trench isolation with dielectric studs for semiconductor integrated circuits

Method of forming a DRAM cell

Non-volatile memory device with high gate coupling ratio and manufacturing process therefor

Method for fabricating narrow channel field effect transistors having titanium shallow junctions

Method for making planar metal interconnections and metal plugs on semiconductor substrates

Method of manufacture DRAM capacitor with reduced layout area

High density dynamic random access memory cell structure having a polysilicon pillar capacitor

Output management of processing in a manufacturing plant

Stacked-gate flash memory and the method of making the same

Structure of flash memory with high coupling ratio

Method of fabricating a high density NAND stacked gate flash memory device having narrow pitch isolation and large capacitance between control and floating gates

Flash memory with conformal floating gate and the method of making the same

High capacitive-coupling ratio of stacked-gate flash memory having high mechanical strength floating gate

Method for fabricating flash memory with recessed floating gates

Method of forming a metal silicide layer on a source/drain region of a MOSFET device

Method of making dishing-free insulator in trench isolation

Method of forming a metal silicide layer on a polysilicon gate structure and on a source/drain region of a MOSFET device

Method for manufacturing diffusion barrier layer

Method of selectively forming a barrier layer from a directionally deposited metal layer

Methods of forming trench isolation regions using spin-on material

Photolithography alignment mark manufacturing process in tungsten CMP metallization

IC manufacturing costing control system and process

Method of making titanium silicide source/drains and tungsten silicide gate electrodes for field effect transistors

EPROM manufacturing process having a floating gate with a large surface area

Method for making low-resistance contacts between polysilicon and metal silicide on semiconductor integrated circuits

Method for making dynamic random access memory cells having double-crown stacked capacitors with center posts

TAIWAN SEMICONDUCTOR MFG CO LTD

FinFETs and methods of forming FinFETs

FinFET devices and methods of forming the same

FinFET gate structure and method for fabricating the same

FinFET devices and methods of forming the same

Fin field effect transistor, semiconductor device and fabricating method thereof

Semiconductor structure having a gas-filled gap

Interconnection structure, fabricating method thereof, and semiconductor device using the same

Source and drain process for FinFET

TAIWAN SEMICONDUCTOR MFG

Megasonic immersion lithography exposure apparatus and method

Stable metal structure with tungsten plug

Damascene structure at semiconductor substrate level

Method for fabricating copper interconnects

Interconnect with composite barrier layers and method for fabricating the same

Method of selectively making copper using plating technology

IND TECH RES INST

Method of forming a high density self-aligned stack in trench

Self-aligned cylindrical stacked capacitor DRAM cell

(unassigned)

Method of forming stacked gate for flash memories