Inventor
MOLL HANS-PETER
DE33 patents
⚠️ This page may combine multiple inventors who share the name “MOLL HANS-PETER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALFOUNDRIES INC
19 patentsUS8889022B2Nov 18, 2014
Methods of forming asymmetric spacers on various structures on integrated circuit products
GLOBALFOUNDRIES INC7 citations83
US9735174B2Aug 15, 2017
FDSOI—capacitor
GLOBALFOUNDRIES INC3 citations73
US9425189B1Aug 23, 2016
Compact FDSOI device with Bulex contact extending through buried insulating layer adjacent gate structure for back-bias
GLOBALFOUNDRIES INC4 citations73
US9627409B2Apr 18, 2017
Semiconductor device with thin-film resistor
GLOBALFOUNDRIES INC2 citations71
US10048311B2Aug 14, 2018
Detection of gate-to-source/drain shorts
GLOBALFOUNDRIES INC2 citations70
US9502564B2Nov 22, 2016
Fully depleted device with buried insulating layer in channel region
GLOBALFOUNDRIES INC2 citations63
US9391156B2Jul 12, 2016
Embedded capacitor
GLOBALFOUNDRIES INC2 citations63
US10224251B2Mar 5, 2019
Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode lines
GLOBALFOUNDRIES INC1 citations62
US9960184B2May 1, 2018
FDSOI-capacitor
GLOBALFOUNDRIES INC0 citations52
US9608003B2Mar 28, 2017
Integrated circuit product with bulk and SOI semiconductor devices
GLOBALFOUNDRIES INC1 citations52
US9553030B2Jan 24, 2017
Method of manufacturing P-channel FET device with SiGe channel
GLOBALFOUNDRIES INC0 citations52
US9443871B2Sep 13, 2016
Cointegration of bulk and SOI semiconductor devices
GLOBALFOUNDRIES INC0 citations52
US9385232B2Jul 5, 2016
FD devices in advanced semiconductor techniques
GLOBALFOUNDRIES INC0 citations52
US9111756B2Aug 18, 2015
Integrated circuits with protected resistors and methods for fabricating the same
GLOBALFOUNDRIES INC0 citations51
US9023709B2May 5, 2015
Top corner rounding by implant-enhanced wet etching
GLOBALFOUNDRIES INC1 citations51
US9673115B2Jun 6, 2017
Test structures and method of forming an according test structure
GLOBALFOUNDRIES INC1 citations49
US9553046B2Jan 24, 2017
E-fuse in SOI configuration
GLOBALFOUNDRIES INC0 citations42
US9466685B2Oct 11, 2016
Semiconductor structure including at least one electrically conductive pillar, semiconductor structure including a contact contacting an outer layer of an electrically conductive structure and method for the formation thereof
GLOBALFOUNDRIES INC0 citations42
US10395981B2Aug 27, 2019
Semiconductor device including a leveling dielectric fill material
GLOBALFOUNDRIES INC0 citations37
INFINEON TECHNOLOGIES AG
11 patentsUS6932916B2Aug 23, 2005
Semiconductor substrate with trenches of varying depth
INFINEON TECHNOLOGIES AG13 citations84
US6916721B2Jul 12, 2005
Method for fabricating a trench capacitor with an insulation collar
INFINEON TECHNOLOGIES AG11 citations72
US7261829B2Aug 28, 2007
Method for masking a recess in a structure having a high aspect ratio
INFINEON TECHNOLOGIES AG4 citations60
US6770530B2Aug 3, 2004
Method for producing a shallow trench isolation for n- and p-channel field-effect transistors in a semiconductor module
INFINEON TECHNOLOGIES AG6 citations60
US7084029B2Aug 1, 2006
Method for fabricating a hole trench storage capacitor in a semiconductor substrate, and hole trench storage capacitor
INFINEON TECHNOLOGIES AG3 citations57
US6586308B2Jul 1, 2003
Method for producing circuit structures on a semiconductor substrate and semiconductor configuration with functional circuit structures and dummy circuit structures
INFINEON TECHNOLOGIES AG2 citations57
US7037777B2May 2, 2006
Process for producing an etching mask on a microstructure, in particular a semiconductor structure with trench capacitors, and corresponding use of the etching mask
INFINEON TECHNOLOGIES AG0 citations50
US6964912B2Nov 15, 2005
Method for fabricating a semiconductor structure
INFINEON TECHNOLOGIES AG1 citations50
US6924209B2Aug 2, 2005
Method for fabricating an integrated semiconductor component
INFINEON TECHNOLOGIES AG1 citations49
US7125778B2Oct 24, 2006
Method for fabricating a self-aligning mask
INFINEON TECHNOLOGIES AG0 citations39
US6716720B2Apr 6, 2004
Method for filling depressions on a semiconductor wafer
INFINEON TECHNOLOGIES AG0 citations39