Inventor

HU HSIEN-PIN

TW87 patents

⚠️ This page may combine multiple inventors who share the name “HU HSIEN-PIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HU HSIEN-PIN

TAIWAN SEMICONDUCTOR MFG CO LTD

Package structures and methods of forming the same

Structure and formation method for chip package

Chip package having die structures of different heights and method of forming same

Chip package having die structures of different heights

Testing of semiconductor chips with microbumps

Stacked integrated circuit structure and method of forming

Testing of semiconductor chips with microbumps

Package structures and methods of forming the same

Chip package having die structures of different heights and method of forming same

Giga interposer integration through chip-on-wafer-on-substrate

Package structure and method and equipment for forming the same

Testing of semiconductor chips with microbumps

Package structures and methods of forming the same

Testing of semiconductor chips with microbumps

3D packages and methods for forming the same

Interposer test structures and methods

Method for forming a semiconductor device including forming a first interconnect structure on one side of a substrate having first metal feature closer the substrate than second metal feature and forming first and second tsv on other side of substrate connecting to the metal features

Package structure including through via structures

Method for forming a semiconductor device having TSV formed through a silicon interposer and a second silicon substrate with cavity covering a second die

Package structure and method and equipment for forming the same

Semiconductor devices and methods of manufacture

Package structure and method of fabricating the same

Package structure having line connected via portions

3D packages and methods for forming the same

Stacked integrated circuit structure and method of forming

3D packages and methods for forming the same

Interposer test structures and methods

Forming large chips through stitching

Cylindrical embedded capacitors

Method of forming a dummy die of an integrated circuit having an embedded annular structure

Semiconductor device and method of manufacture

TAIWAN SEMICONDUCTOR MFG

Testing of semiconductor chips with microbumps

3D packages and methods for forming the same

Testing of semiconductor chips with microbumps

Methods and apparatus for inductors and transformers in packages

Integrated circuits and methods of forming the same

Methods for forming stacked capacitors with fuse protection

Methods and apparatus of packaging with interposers

3-D inductor and transformer

HU HSIEN-PIN

Approach for bonding dies onto interposers

Approach for bonding dies onto interposers

Approach for bonding dies onto interposers

YEN HSIAO-TSUNG

Through-substrate via waveguides

3D inductor and transformer

LIU TZUAN-HORNG

Interposer test structures and methods

WU WEI-CHENG

Testing of semiconductor chips with microbumps

HU HSIEN PIN

3D IC architecture with interposer and interconnect structure for bonding dies

HSIEH CHI-CHUN

Forming grounded through-silicon vias in a semiconductor substrate

HOU SHANG-YUN

Test structure and method of testing electrical characteristics of through vias

SU AN-JHIH

Cylindrical embedded capacitors