Inventor · disambiguated record
Bipul C. Paul
Also filed as: PAUL BIPUL · PAUL BIPUL C
68 granted patents·7 pending applications·501 citations·filing 2006–2023
98Inventor score
Files withGLOBALFOUNDRIES INC37GLOBALFOUNDRIES US INC26PAUL BIPUL C6TOSHIBA AMERICA RES INC4MOJUMDER NILADRI1
Top patents by PatentIndex Score
75 records- 0199US10332803B1Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of formingGLOBALFOUNDRIES INC·Filed 2018·Granted Jun 25, 2019·83 cites·20 claims
- 0299US10170484B1Integrated circuit structure incorporating multiple gate-all-around field effect transistors having different drive currents and methodGLOBALFOUNDRIES INC·Filed 2017·Granted Jan 1, 2019·61 cites·20 claims
- 0398US10840146B1Structures and SRAM bit cells with a buried cross-couple interconnectGLOBALFOUNDRIES INC·Filed 2019·Granted Nov 17, 2020·62 cites·20 claims
- 0498US9825032B1Metal layer routing level for vertical FET SRAM and logic cell scalingGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 21, 2017·41 cites·14 claims
- 0597US12002869B2Gate contact structures and cross-coupled contact structures for transistor devicesGLOBALFOUNDRIES US INC·Filed 2022·Granted Jun 4, 2024·4 cites·16 claims
- 0697US10304833B1Method of forming complementary nano-sheet/wire transistor devices with same depth contactsGLOBALFOUNDRIES INC·Filed 2018·Granted May 28, 2019·19 cites·20 claims
- 0797US10236215B1Methods of forming gate contact structures and cross-coupled contact structures for transistor devicesGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 19, 2019·22 cites·19 claims
- 0897US10109637B1Cross couple structure for vertical transistorsGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 23, 2018·20 cites·20 claims
- 0996US10818674B2Structures and SRAM bit cells integrating complementary field-effect transistorsGLOBALFOUNDRIES INC·Filed 2019·Granted Oct 27, 2020·12 cites·15 claims
- 1095US11475941B2Non-volatile transistor embedded static random access memory (SRAM) cellGLOBALFOUNDRIES US INC·Filed 2020·Granted Oct 18, 2022·4 cites·20 claims
- 1195US11309319B2Structures and SRAM bit cells integrating complementary field-effect transistorsGLOBALFOUNDRIES US INC·Filed 2020·Granted Apr 19, 2022·3 cites·20 claims
- 1295US11201152B2Method, apparatus, and system for fin-over-nanosheet complementary field-effect-transistorGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 14, 2021·12 cites·5 claims
- 1395US10756096B2Integrated circuit structure with complementary field effect transistor and buried metal interconnect and methodGLOBALFOUNDRIES INC·Filed 2018·Granted Aug 25, 2020·13 cites·20 claims
- 1495US10418449B2Circuits based on complementary field-effect transistorsGLOBALFOUNDRIES INC·Filed 2018·Granted Sep 17, 2019·14 cites·20 claims
- 1594US10707218B2Two port SRAM cell using complementary nano-sheet/wire transistor devicesGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 7, 2020·9 cites·20 claims
- 1694US10056377B2Metal layer routing level for vertical FET SRAM and logic cell scalingGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 21, 2018·9 cites·20 claims
- 1794US9761662B1Active area shapes reducing device sizeGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 12, 2017·9 cites·14 claims
- 1892US10651284B2Methods of forming gate contact structures and cross-coupled contact structures for transistor devicesGLOBALFOUNDRIES INC·Filed 2017·Granted May 12, 2020·7 cites·18 claims
- 1990US11587601B1Apparatus and method for controlled transmitting of read pulse and write pulse in memoryGLOBALFOUNDRIES US INC·Filed 2021·Granted Feb 21, 2023·2 cites·20 claims
- 2090US10418368B1Buried local interconnect in source/drain regionGLOBALFOUNDRIES INC·Filed 2018·Granted Sep 17, 2019·7 cites·20 claims
- 2189US10665281B1Resistive nonvolatile memory cells with shared access transistorsGLOBALFOUNDRIES INC·Filed 2019·Granted May 26, 2020·9 cites·20 claims
- 2288US8391281B2Router design for 3D network-on-chipPAUL BIPUL C·Filed 2010·Granted Mar 5, 2013·13 cites·19 claims
- 2384US10950610B2Asymmetric gate cut isolation for SRAMGLOBALFOUNDRIES US INC·Filed 2019·Granted Mar 16, 2021·3 cites·10 claims
- 2482US9929236B1Active area shapes reducing device sizeGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 27, 2018·3 cites·20 claims
- 2581US10403629B2Six-transistor (6T) SRAM cell structureGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 3, 2019·5 cites·20 claims
- 2680US10720391B1Method of forming a buried interconnect and the resulting devicesGLOBALFOUNDRIES INC·Filed 2019·Granted Jul 21, 2020·2 cites·16 claims
- 2780US8921179B2Edge and strap cell design for SRAM arrayPAUL BIPUL C·Filed 2013·Granted Dec 30, 2014·6 cites·17 claims
- 2878US10586581B1Dynamic bipolar write-assist for non-volatile memory elementsGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 10, 2020·5 cites·20 claims
- 2977US10777607B1Bitcells for a non-volatile memory deviceGLOBALFOUNDRIES INC·Filed 2019·Granted Sep 15, 2020·2 cites·20 claims
- 3076US7646622B2Memory based computation systems and methods of using the sameTOSHIBA AMERICA RES INC·Filed 2007·Granted Jan 12, 2010·4 cites·24 claims
- 3175US10685951B1Wordline strapping for non-volatile memory elementsGLOBALFOUNDRIES INC·Filed 2018·Granted Jun 16, 2020·2 cites·18 claims
- 3275US8751985B1Hierarchical layout versus schematic (LVS) comparison with extraneous device eliminationGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 10, 2014·5 cites·16 claims
- 3374US10236296B1Cross-coupled contact structure on IC products and methods of making such contact structuresGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 19, 2019·2 cites·20 claims
- 3473US11087814B2Sensing scheme for STT-MRAM using low-barrier nanomagnetsGLOBALFOUNDRIES US INC·Filed 2019·Granted Aug 10, 2021·2 cites·20 claims
- 3573US10811069B2Non-volatile memory elements with multiple access transistorsGLOBALFOUNDRIES INC·Filed 2019·Granted Oct 20, 2020·2 cites·18 claims
- 3673US8064253B2Multi-valued ROM using carbon-nanotube and nanowire FETPAUL BIPUL C·Filed 2009·Granted Nov 22, 2011·5 cites·20 claims
- 3770US11004509B1Circuit structure and memory circuit with resistive memory elements, and related methodsGLOBALFOUNDRIES US INC·Filed 2019·Granted May 11, 2021·2 cites·19 claims
- 3870US9202552B2Dual port SRAM bitcell structures with improved transistor arrangementGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 1, 2015·4 cites·19 claims
- 3968US10629602B2Static random access memory cells with arranged vertical-transport field-effect transistorsGLOBALFOUNDRIES INC·Filed 2018·Granted Apr 21, 2020·1 cites·9 claims
- 4068US10510392B1Integrated circuits having memory cells with shared bit lines and shared source linesGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 17, 2019·2 cites·18 claims
- 4167US10515679B2Magneto-resistive memory structures with improved sensing, and associated sensing methodsGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 24, 2019·2 cites·20 claims
- 4267US10439064B1Dual port vertical transistor memory cellGLOBALFOUNDRIES INC·Filed 2018·Granted Oct 8, 2019·1 cites·18 claims
- 4366US11776606B2Sensing scheme for STT-MRAM using low-barrier nanomagnetsGLOBALFOUNDRIES US INC·Filed 2021·Granted Oct 3, 2023·0 cites·19 claims
- 4466US10109636B2Active contact and gate contact interconnect for mitigating adjacent gate electrode shortagesGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 23, 2018·1 cites·8 claims
- 4565US11469309B2Gate contact structures and cross-coupled contact structures for transistor devicesGLOBALFOUNDRIES US INC·Filed 2020·Granted Oct 11, 2022·0 cites·10 claims
- 4663US10121713B1In-kerf test structure and testing method for a memory arrayGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 6, 2018·1 cites·7 claims
- 4762US12328880B2Hierarchical memory architecture including on-chip multi-bank non-volatile memory with low leakage and low latencyGLOBALFOUNDRIES US INC·Filed 2023·Granted Jun 10, 2025·0 cites·20 claims
- 4862US12176023B2Non-volatile static random access memory bit cells with ferroelectric field-effect transistorsGLOBALFOUNDRIES US INC·Filed 2022·Granted Dec 24, 2024·0 cites·20 claims
- 4962US11120857B2Low variability reference parameter generation for magnetic random access memoryGLOBALFOUNDRIES US INC·Filed 2019·Granted Sep 14, 2021·1 cites·20 claims
- 5062US7570505B2Memory based computation systems and methods for high performance and/or fast operationsTOSHIBA AMERICA RES INC·Filed 2006·Granted Aug 4, 2009·2 cites·15 claims
Showing the top 50 of 75 patent records by PatentIndex Score.
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