Inventor

SU KUAN-CHENG

TW59 patents

⚠️ This page may combine multiple inventors who share the name “SU KUAN-CHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SU KUAN-CHENG

UNITED MICROELECTRONICS CORP

Fin type electrostatic discharge protection device

Buried contact method to release plasma-induced charging damage on device

Method of manufacture of multi-state mask ROM and multi-state mask ROM device produced thereby

Stacked CVD oxide architecture multi-state memory cell for mask read-only memories

Multi-state read-only memory using multiple polysilicon selective depositions

Process for fabricating high-density mask ROM devices

Field effect transistor with recessed buried source and drain regions

Semiconductor device for electrostatic discharge protection and method of forming the same

Electrostatic discharge protection semiconductor device

Metal gate structure and method of forming the same

Method for fabricating a capacitor

Buried contact method to release plasma-included charging damage on device

Process for making identification alphanumeric code markings for mask ROM devices

CVD oxide coding method for ultra-high density mask read-only-memory (ROM)

Method for fabricating read-only-memory devices with self-aligned code implants

Electrostatic discharge protection semiconductor device

Electrostatic discharge protection semiconductor device

Electrostatic discharge protection semiconductor device

Electrostatic discharge protection semiconductor device

ESD unit

Electrostatic discharge protection semiconductor device

Semiconductor device

Method of reducing junction capacitance of source/drain region

Method of enhancing electrostatic discharge (ESD) protection capability in integrated circuits

Post passivation programmed mask ROM

Post passivation mask ROM programming method

Field effect transistor with recessed buried source and drain regions

Plasma arcing sensor

Method for fabricating a tri-state read-only memory device

Fin diode structure

Electrostatic discharge protection semiconductor device

Method for fabricating a test structure

Test structure

Semiconductor device

Electrostatic discharge protection structure

On-wafer AC stress test circuit

Fin type electrostatic discharge protection device

Method of manufacturing fin diode structure

Fin diode structure

Complementary metal-oxide-semiconductor device

Fin diode structure

ESD protection circuit and ESD protection device thereof

Tri-state read-only memory device and method for fabricating the same

Method for removing a diffusion barrier layer on pad regions

Electrostatic discharge protection semiconductor device

Electrostatic discharge protection device and method for producing an electrostatic discharge protection device

Electrostatic discharge protection device including source silicide pattern and drain silicide pattern

WANG CHANG-TZU

Electrostatic discharge (ESD) protection device

ESD protection circuit and ESD protection device thereof

WEN YUNG-JU

Electrostatic discharge (ESD) device and semiconductor structure