Inventor · disambiguated record
Sungjun Chun
Also filed as: CHUN SUNGJUN
38 granted patents·8 pending applications·160 citations·filing 2002–2024
96Inventor score
Top patents by PatentIndex Score
46 records- 0194US10135162B1Method for fabricating a hybrid land grid array connectorIBM·Filed 2017·Granted Nov 20, 2018·8 cites·7 claims
- 0292US10128593B1Connector having a body with a conductive layer common to top and bottom surfaces of the body as well as to wall surfaces of a plurality of holes in the bodyIBM·Filed 2017·Granted Nov 13, 2018·6 cites·12 claims
- 0392US9357649B2276-pin buffered memory card with enhanced memory system interconnectCHUN SUNGJUN·Filed 2012·Granted May 31, 2016·15 cites·20 claims
- 0490US7646082B2Multi-layer circuit substrate and method having improved transmission line integrity and increased routing densityIBM·Filed 2007·Granted Jan 12, 2010·15 cites·16 claims
- 0589US7348667B2System and method for noise reduction in multi-layer ceramic packagesIBM·Filed 2005·Granted Mar 25, 2008·17 cites·20 claims
- 0688US6789241B2Methodology for determining the placement of decoupling capacitors in a power distribution systemSUN MICROSYSTEMS INC·Filed 2002·Granted Sep 7, 2004·59 cites·60 claims
- 0784US11658378B2Vertically transitioning between substrate integrated waveguides (SIWs) within a multilayered printed circuit board (PCB)IBM·Filed 2019·Granted May 23, 2023·4 cites·14 claims
- 0882US10216884B2Signal via positioning in a multi-layer circuit board using a genetic via placement solverIBM·Filed 2017·Granted Feb 26, 2019·2 cites·10 claims
- 0981US8927879B2Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structuresCHOI JINWOO·Filed 2010·Granted Jan 6, 2015·4 cites·7 claims
- 1081US8624297B2Multi-layer circuit substrate fabrication and design methods providing improved transmission line integrity and increased routing densityCHUN SUNGJUN·Filed 2009·Granted Jan 7, 2014·7 cites·9 claims
- 1179US9940426B2Signal via positioning in a multi-layer circuit boardIBM·Filed 2015·Granted Apr 10, 2018·2 cites·8 claims
- 1279US9916410B2Signal via positioning in a multi-layer circuit boardIBM·Filed 2015·Granted Mar 13, 2018·2 cites·15 claims
- 1378US8645889B2Noise coupling reduction and impedance discontinuity control in high-speed ceramic modulesCHOI JINWOO·Filed 2012·Granted Feb 4, 2014·4 cites·11 claims
- 1477US8288657B2Noise coupling reduction and impedance discontinuity control in high-speed ceramic modulesCHOI JINWOO·Filed 2009·Granted Oct 16, 2012·6 cites·13 claims
- 1576US10223490B2Signal via positioning in a multi-layer circuit board using a genetic via placement solverIBM·Filed 2017·Granted Mar 5, 2019·1 cites·13 claims
- 1675US9875331B2Signal via positioning in a multi-layer circuit board using a genetic via placement solverIBM·Filed 2017·Granted Jan 23, 2018·1 cites·13 claims
- 1773US9881115B2Signal via positioning in a multi-layer circuit board using a genetic via placement solverIBM·Filed 2016·Granted Jan 30, 2018·1 cites·18 claims
- 1872US8813000B2System for designing substrates having reference plane voids with strip segmentsIBM·Filed 2013·Granted Aug 19, 2014·1 cites·2 claims
- 1969US9955567B2Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structuresIBM·Filed 2014·Granted Apr 24, 2018·1 cites·10 claims
- 2069US8962475B2Multi-layer circuit substrate fabrication method providing improved transmission line integrity and increased routing densityIBM·Filed 2013·Granted Feb 24, 2015·1 cites·4 claims
- 2169US7821796B2Reference plane voids with strip segment for improving transmission line integrity over viasIBM·Filed 2008·Granted Oct 26, 2010·2 cites·13 claims
- 2261US12504747B2Multicomponent module design and fabricationIBM·Filed 2021·Granted Dec 23, 2025·0 cites·19 claims
- 2360US2025328177A1Two-stage processor voltage regulationIBM·Filed 2024·Application pending·0 cites
- 2460US2025336890A1On-die control for active interposer voltage regulationIBM·Filed 2024·Application pending·0 cites
- 2559US10657308B2Signal via positioning in a multi-layer circuit boardIBM·Filed 2017·Granted May 19, 2020·0 cites·20 claims
- 2658US8638567B2Circuit manufacturing and design techniques for reference plane voids with strip segmentCHUN SUNGJUN·Filed 2012·Granted Jan 28, 2014·0 cites·2 claims
- 2758US8625300B2Circuit manufacturing and design techniques for reference plane voids with strip segmentCHUN SUNGJUN·Filed 2012·Granted Jan 7, 2014·0 cites·2 claims
- 2857US12266598B2Dense via pitch interconnect to increase wiring densityIBM·Filed 2022·Granted Apr 1, 2025·0 cites·20 claims
- 2956US9374910B2Printed circuit board copper plane repairIBM·Filed 2013·Granted Jun 21, 2016·0 cites·11 claims
- 3056US2024213217A1Clustering fine pitch micro-bumps for packaging and testIBM·Filed 2022·Application pending·0 cites
- 3155US2024321802A1Processor package substrate with high-speed top-surface connection to cable interconnectIBM·Filed 2023·Application pending·0 cites
- 3255US2025315098A1Global processor core voltage control through integrated voltage regulationIBM·Filed 2024·Application pending·0 cites
- 3354US10375820B2Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structuresIBM·Filed 2018·Granted Aug 6, 2019·0 cites·7 claims
- 3452US11399428B2PCB with substrate integrated waveguides using multi-band monopole antenna feeds for high speed communicationIBM·Filed 2019·Granted Jul 26, 2022·0 cites·17 claims
- 3551US9980382B2Method of making a printed circuit board copper plane repairIBM·Filed 2015·Granted May 22, 2018·0 cites·3 claims
- 3651US7313747B2Measuring microprocessor susceptibility to internal noise generationIBM·Filed 2006·Granted Dec 25, 2007·1 cites·33 claims
- 3749US8325490B2Circuit manufacturing and design techniques for reference plane voids with strip segmentCHUN SUNGJUN·Filed 2010·Granted Dec 4, 2012·0 cites·6 claims
- 3847US9477568B2Managing interconnect electromigration effectsIBM·Filed 2013·Granted Oct 25, 2016·0 cites·18 claims
- 3947US2007080436A1System and Method for Noise Reduction in Multi-Layer Ceramic PackagesIBM·Filed 2006·Application pending·0 cites
- 4046US9485866B2Printed circuit board copper plane repairIBM·Filed 2016·Granted Nov 1, 2016·0 cites·1 claims
- 4146US7945881B2Method of reducing crosstalk induced noise in circuitry designsIBM·Filed 2007·Granted May 17, 2011·0 cites·18 claims
- 4243US8257092B2Redundant clock channel for high reliability connectorsCHUN SUNGJUN·Filed 2010·Granted Sep 4, 2012·0 cites·20 claims
- 4339US7868608B2Detecting open ground connections in surface mount connectorsIBM·Filed 2009·Granted Jan 11, 2011·0 cites·20 claims
- 4435US8407644B2Reducing crosstalk in the design of module netsCABRERA DULCE M ALTABELLA·Filed 2009·Granted Mar 26, 2013·0 cites·20 claims
- 4534US2009206680A1Apparatus for Suppressing Mid-Frequency Noise in an Integrated Circuit Having Multiple Voltage IslandsCHUN SUNGJUN·Filed 2008·Application pending·0 cites
- 4630US2008224714A1System and Method of Integrated Circuit Control for in Situ Impedance MeasurementVIRUTCHAPUNT TANIT·Filed 2007·Application pending·0 cites
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