Inventor · disambiguated record
Sheng-Da Liu
Also filed as: LIU SHENG · LIU SHENG-DA
16 granted patents·2 pending applications·447 citations·filing 2004–2017
93Inventor score
Top patents by PatentIndex Score
18 records- 0198US7425740B2Method and structure for a 1T-RAM bit cell and macroTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Sep 16, 2008·278 cites·26 claims
- 0296US8374050B2Multi-port memory using single-port memory cellsLSI CORP·Filed 2011·Granted Feb 12, 2013·40 cites·23 claims
- 0396US8174073B2Integrated circuit structures with multiple FinFETsLEE TSUNG-LIN·Filed 2007·Granted May 8, 2012·51 cites·3 claims
- 0495US7381649B2Structure for a multiple-gate FET device and a method for its fabricationTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Jun 3, 2008·30 cites·19 claims
- 0591US8724423B1Synchronous two-port read, two-port write memory emulatorLSI CORP·Filed 2012·Granted May 13, 2014·16 cites·20 claims
- 0686USRE45165EStructure for a multiple-gate FET device and a method for its fabricationCHEN HUNG-WEI·Filed 2012·Granted Sep 30, 2014·8 cites·36 claims
- 0784US8473657B2High speed packet FIFO output buffers for switch fabric with speedupZHOU TING·Filed 2010·Granted Jun 25, 2013·8 cites·17 claims
- 0872US7271448B2Multiple gate field effect transistor structureTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Sep 18, 2007·5 cites·40 claims
- 0969USRE45180EStructure for a multiple-gate FET device and a method for its fabricationCHEN HUNG-WEI·Filed 2010·Granted Oct 7, 2014·2 cites·19 claims
- 1066US8243737B2High speed packet FIFO input buffers for switch fabric with speedup and retransmitZHOU TING·Filed 2010·Granted Aug 14, 2012·2 cites·19 claims
- 1160US8359466B2Security association prefetch for security protcol processingLSI CORP·Filed 2011·Granted Jan 22, 2013·1 cites·19 claims
- 1258US7883979B2Method for manufacturing a semiconductor device with reduced floating body effectTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Feb 8, 2011·6 cites·13 claims
- 1354USRE45944EStructure for a multiple-gate FET device and a method for its fabricationTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Mar 22, 2016·0 cites·40 claims
- 1444US8017488B2Manufacturing method of a NOR flash memory with phosphorous and arsenic ion implantationsEON SILICON SOLUTIONS INC·Filed 2009·Granted Sep 13, 2011·0 cites·5 claims
- 1539US2017338989A1Peak-to-Average Ratio Reduction Method, Apparatus, Device, and SystemHUAWEI TECH CO LTD·Filed 2017·Application pending·0 cites
- 1636US8923089B2Single-port read multiple-port write storage device using single-port memory cellsLSI CORP·Filed 2012·Granted Dec 30, 2014·0 cites·19 claims
- 1734US2012094450A1Manufacturing method of multi-level cell nor flash memoryWU YIDER·Filed 2010·Application pending·0 cites
- 1829US8325518B2Multi-level cell NOR flash memory deviceLIU SHENG-DA·Filed 2010·Granted Dec 4, 2012·0 cites·3 claims
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