Inventor

YU MING-HUA

TW119 patents

⚠️ This page may combine multiple inventors who share the name “YU MING-HUA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YU MING-HUA

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device, static random access memory cell and manufacturing method of semiconductor device

Semiconductor device and method

FinFET device having flat-top epitaxial features and method of making the same

Semiconductor device and method

Integrated circuit and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Fin structure of semiconductor device, manufacturing method thereof, and manufacturing method of active region of semiconductor device

FinFET with rounded source/drain profile

Structure and method for semiconductor device

V-shaped epitaxially formed semiconductor layer

Confined source/drain epitaxy regions and method forming same

Confined source/drain epitaxy regions and method forming same

Semiconductor device having epitaxy source/drain regions

Semiconductor device and manufacturing method thereof

Source/drain formation with reduced selective loss defects

Semiconductor device and method

FinFETs having epitaxial capping layer on fin and methods for forming the same

Method of forming shaped source/drain epitaxial layers of a semiconductor device

Semiconductor device having merged epitaxial features with arc-like bottom surface and method of making the same

Semiconductor device and method of forming same

Semiconductor device and manufacturing method thereof

Epitaxial growth methods and structures thereof

Semiconductor device having merged epitaxial features with arc-like bottom surface and method of making the same

Method of forming shaped source/drain epitaxial layers of a semiconductor device

Fin Field-Effect Transistors and methods of forming the same

FinFET with rounded source/drain profile

Fin field-effect transistors and methods of forming the same

Semiconductor strips with undercuts and methods for forming the same

Integrated circuit having field-effect trasistors with dielectric fin sidewall structures and manufacturing method thereof

FinFET with bottom SiGe layer in source/drain

Semiconductor device having epitaxy source/drain regions

Increasing source/drain dopant concentration to reduced resistance

TAIWAN SEMICONDUCTOR MFG

FinFET with bottom SiGe layer in source/drain

MOS devices with partial stressor channel

MOS devices with partial stressor channel

Epitaxy silicon on insulator (ESOI)

Source/drain strained layers

SiGe selective growth without a hard mask

FinFET with bottom SiGe layer in source/drain

Silicon layer for stopping dislocation propagation

Method for fabricating a semiconductor device

Silicon layer for stopping dislocation propagation

Epitaxy silicon on insulator (ESOI)

Manufacture method of metal bottom ARC

YU MING-HUA

MOS devices with partial stressor channel

Source/drain strained layers

CHENG YU-HUNG

Method for fabricating a semiconductor device

SU LILLY

Semiconductor device and fabrication method thereof

LEE YEN-RU

Semiconductor device and fabrication method thereof

PENG ERIC

Bottle-neck recess in a semiconductor device