Inventor · disambiguated record
Chao-Nan Chou
Also filed as: CHOU CHAO-NAN
4 granted patents·5 pending applications·97 citations·filing 2004–2008
79Inventor score
Top patents by PatentIndex Score
9 records- 0195US7655501B2Wafer level package with good CTE performanceADVANCED CHIP ENG TECH INC·Filed 2008·Granted Feb 2, 2010·50 cites·10 claims
- 0291US7453148B2Structure of dielectric layers in built-up layers of wafer level packageADVANCED CHIP ENG TECH INC·Filed 2006·Granted Nov 18, 2008·32 cites·18 claims
- 0359US7525139B2Image sensor with a protection layerADVANCED CHIP ENG TECH INC·Filed 2004·Granted Apr 28, 2009·7 cites·8 claims
- 0457US7224061B2Package structureADVANCED CHIP ENG TECH INC·Filed 2004·Granted May 29, 2007·8 cites·14 claims
- 0549US2008142946A1Wafer level package with good cte performanceADVANCED CHIP ENG TECH INC·Filed 2006·Application pending·0 cites
- 0643US2008191297A1Wafer level image sensor package with die receiving cavity and method of the sameADVANCED CHIP ENG TECH INC·Filed 2007·Application pending·0 cites
- 0741US2008174008A1Structure of Memory Card and the Method of the SameYANG WEN-KUN·Filed 2007·Application pending·0 cites
- 0840US2008136004A1Multi-chip package structure and method of forming the sameADVANCED CHIP ENG TECH INC·Filed 2006·Application pending·0 cites
- 0938US2008088004A1Wafer level package structure with build up layersADVANCED CHIP ENG TECH INC·Filed 2006·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →