Inventor · disambiguated record
Anh Phan
Also filed as: PHAN ANH · PHAN ANH-KIET QUANG
44 granted patents·16 pending applications·52 citations·filing 2008–2024
96Inventor score
Top patents by PatentIndex Score
60 records- 0196US11996411B2Stacked forksheet transistorsINTEL CORP·Filed 2020·Granted May 28, 2024·4 cites·21 claims
- 0296US11437283B2Backside contacts for semiconductor devicesINTEL CORP·Filed 2019·Granted Sep 6, 2022·12 cites·25 claims
- 0395US12107085B2Interconnect techniques for electrically connecting source/drain regions of stacked transistorsINTEL CORP·Filed 2023·Granted Oct 1, 2024·2 cites·20 claims
- 0494US11342227B2Stacked transistor structures with asymmetrical terminal interconnectsINTEL CORP·Filed 2020·Granted May 24, 2022·3 cites·20 claims
- 0590US11367722B2Stacked nanowire transistor structure with different channel geometries for stressINTEL CORP·Filed 2018·Granted Jun 21, 2022·6 cites·22 claims
- 0689US12080605B2Backside contacts for semiconductor devicesINTEL CORP·Filed 2022·Granted Sep 3, 2024·1 cites·24 claims
- 0783US12148806B2Stacked source-drain-gate connection and process for forming suchINTEL CORP·Filed 2024·Granted Nov 19, 2024·0 cites·20 claims
- 0883US11742346B2Interconnect techniques for electrically connecting source/drain regions of stacked transistorsINTEL CORP·Filed 2018·Granted Aug 29, 2023·3 cites·24 claims
- 0983US11257738B2Vertically stacked transistor devices with isolation wall structures containing an electrical conductorINTEL CORP·Filed 2017·Granted Feb 22, 2022·3 cites·25 claims
- 1082US11676966B2Stacked transistors having device strata with different channel widthsINTEL CORP·Filed 2019·Granted Jun 13, 2023·2 cites·19 claims
- 1182US11348916B2Leave-behind protective layer having secondary purposeINTEL CORP·Filed 2018·Granted May 31, 2022·3 cites·13 claims
- 1281US11764263B2Gate-all-around integrated circuit structures having depopulated channel structures using multiple bottom-up oxidation approachesINTEL CORP·Filed 2019·Granted Sep 19, 2023·2 cites·11 claims
- 1381US11573798B2Stacked transistors with different gate lengths in different device strataINTEL CORP·Filed 2019·Granted Feb 7, 2023·1 cites·23 claims
- 1479US11916118B2Stacked source-drain-gate connection and process for forming suchINTEL CORP·Filed 2023·Granted Feb 27, 2024·0 cites·20 claims
- 1579US11393818B2Stacked transistors with Si PMOS and high mobility thin film transistor NMOSINTEL CORP·Filed 2018·Granted Jul 19, 2022·2 cites·24 claims
- 1678US12255137B2Sideways vias in isolation areas to contact interior layers in stacked devicesINTEL CORP·Filed 2024·Granted Mar 18, 2025·0 cites·12 claims
- 1778US12224202B2Forming an oxide volume within a finINTEL CORP·Filed 2023·Granted Feb 11, 2025·0 cites·13 claims
- 1877US11640961B2III-V source/drain in top NMOS transistors for low temperature stacked transistor contactsINTEL CORP·Filed 2018·Granted May 2, 2023·2 cites·15 claims
- 1977US2024371700A1Backside contacts for semiconductor devicesINTEL CORP·Filed 2024·Application pending·0 cites
- 2073US2024047559A1Gate-all-around integrated circuit structures having depopulated channel structures using bottom-up oxidation approachINTEL CORP·Filed 2023·Application pending·0 cites
- 2173US2024234422A1Stacked forksheet transistorsINTEL CORP·Filed 2024·Application pending·0 cites
- 2272US11894372B2Stacked trigate transistors with dielectric isolation and process for forming suchINTEL CORP·Filed 2023·Granted Feb 6, 2024·0 cites·20 claims
- 2372US11699637B2Vertically stacked transistor devices with isolation wall structures containing an electrical conductorINTEL CORP·Filed 2021·Granted Jul 11, 2023·0 cites·25 claims
- 2472US11616056B2Vertical diode in stacked transistor architectureINTEL CORP·Filed 2018·Granted Mar 28, 2023·1 cites·20 claims
- 2572US8501626B2Methods for high temperature etching a high-K material gate structureLIU WEI·Filed 2008·Granted Aug 6, 2013·4 cites·13 claims
- 2671US11437405B2Transistors stacked on front-end p-type transistorsINTEL CORP·Filed 2018·Granted Sep 6, 2022·1 cites·25 claims
- 2770US12033896B2Isolation wall stressor structures to improve channel stress and their methods of fabricationINTEL CORP·Filed 2022·Granted Jul 9, 2024·0 cites·20 claims
- 2870US11869894B2Metallization structures for stacked device connectivity and their methods of fabricationINTEL CORP·Filed 2022·Granted Jan 9, 2024·0 cites·20 claims
- 2970US2023369399A1Gate-all-around integrated circuit structures having depopulated channel structures using multiple bottom-up oxidation approachesINTEL CORP·Filed 2023·Application pending·0 cites
- 3066US11996408B2Leave-behind protective layer having secondary purposeINTEL CORP·Filed 2022·Granted May 28, 2024·0 cites·18 claims
- 3162US11646352B2Stacked source-drain-gate connection and process for forming suchINTEL CORP·Filed 2019·Granted May 9, 2023·0 cites·25 claims
- 3261US11830933B2Gate-all-around integrated circuit structures having depopulated channel structures using bottom-up oxidation approachINTEL CORP·Filed 2019·Granted Nov 28, 2023·0 cites·11 claims
- 3361US2025301779A1Transistor assemblies with patterned back side-filled isolation regionsINTEL CORP·Filed 2024·Application pending·0 cites
- 3460US11764104B2Forming an oxide volume within a finINTEL CORP·Filed 2019·Granted Sep 19, 2023·0 cites·8 claims
- 3560US11594533B2Stacked trigate transistors with dielectric isolation between first and second semiconductor finsINTEL CORP·Filed 2019·Granted Feb 28, 2023·0 cites·14 claims
- 3657US11942416B2Sideways vias in isolation areas to contact interior layers in stacked devicesINTEL CORP·Filed 2019·Granted Mar 26, 2024·0 cites·16 claims
- 3756US11552104B2Stacked transistors with dielectric between channels of different device strataINTEL CORP·Filed 2019·Granted Jan 10, 2023·0 cites·19 claims
- 3856US11430814B2Metallization structures for stacked device connectivity and their methods of fabricationINTEL CORP·Filed 2018·Granted Aug 30, 2022·0 cites·25 claims
- 3955US11393722B2Isolation wall stressor structures to improve channel stress and their methods of fabricationINTEL CORP·Filed 2018·Granted Jul 19, 2022·0 cites·18 claims
- 4055US2025210522A1Air-gapped isolation wallsINTEL CORP·Filed 2023·Application pending·0 cites
- 4154US2025210412A1Recessed oxide and seam-first etch for air-gapped isolation wallsINTEL CORP·Filed 2023·Application pending·0 cites
- 4254US2025098242A1Air gap insulation in place of gate spacersINTEL CORP·Filed 2023·Application pending·0 cites
- 4354US2025098239A1Air gap insulation in place of gate spacersINTEL CORP·Filed 2023·Application pending·0 cites
- 4454US2024186398A1Integrated circuit structures with cavity spacersINTEL CORP·Filed 2022·Application pending·0 cites
- 4549US12020929B2Epitaxial layer with substantially parallel sidesINTEL CORP·Filed 2019·Granted Jun 25, 2024·0 cites·11 claims
- 4648US11616060B2Techniques for forming gate structures for transistors arranged in a stacked configuration on a single fin structureINTEL CORP·Filed 2018·Granted Mar 28, 2023·0 cites·20 claims
- 4748US11482621B2Vertically stacked CMOS with upfront M0 interconnectINTEL CORP·Filed 2018·Granted Oct 25, 2022·0 cites·16 claims
- 4848US11374024B2Integrated circuits with stacked transistors and methods of manufacturing the same using processes which fabricate lower gate structures following completion of portions of an upper transistorINTEL CORP·Filed 2017·Granted Jun 28, 2022·0 cites·19 claims
- 4947US11532719B2Transistors on heterogeneous bonding layersINTEL CORP·Filed 2018·Granted Dec 20, 2022·0 cites·18 claims
- 5047US11424160B2Self-aligned local interconnectsINTEL CORP·Filed 2019·Granted Aug 23, 2022·0 cites·25 claims
Showing the top 50 of 60 patent records by PatentIndex Score.
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